Achieving optimum performance with a high-frequency amplifier such as the LMH32404-Q1 requires careful attention to board layout parasitics and external component types. Recommendations that optimize performance include:

• Minimize parasitic capacitance from the signal I/O pins to ac ground. Parasitic capacitance on the output pins can cause instability, whereas parasitic capacitance on the input pin reduces the amplifier bandwidth. Cut out the power and ground traces under the signal input and output pins to reduce unwanted capacitance. Otherwise, ground and power planes must be unbroken elsewhere on the board.
• Minimize the distance from the power-supply pins to high-frequency bypass capacitors. Use low inductance ceramic capacitors as decoupling capacitors with voltage ratings at least three times greater than the amplifiers maximum power supplies. Place a combination of 100 pf (or higher) and 33 nF (or higher) capacitors on the same side as the DUT. If space constraints force the larger value bypass capacitors to be placed on the opposite side of the PCB, use multiple vias on the supply and ground side of the capacitors. This configuration makes sure that there is a low-impedance path to the amplifiers power-supply pins across the amplifiers gain bandwidth specification. Avoid narrow power and ground traces to minimize inductance between the pins and the decoupling capacitors. Larger (2.2-µF to 6.8-µF) decoupling capacitors that are effective at lower frequency must be used on the supply pins. Place these decoupling capacitors further from the device. Share the decoupling capacitors among several devices in the same area of the printed circuit board (PCB).
• For more information on board design and layout, see the evaluation module user guide, LMH32404 Evaluation Module User's Guide.