SNOSD63
June 2017
LMH6624-MIL
PRODUCTION DATA.
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics ±2.5 V
6.6
Electrical Characteristics ±6 V
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Feature Description
7.2.1
Bias Current Cancellation
7.2.2
Total Input Noise vs Source Resistance
7.2.3
Noise Figure
7.2.4
Low-Noise Integrator
7.2.5
High-Gain Sallen-Key Active Filters
7.2.6
Low-Noise Magnetic Media Equalizer
7.3
Device Functional Modes
7.3.1
Single Supply Operation
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.3
Application Curve
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Documentation Support
11.1.1
Related Documentation
11.2
Receiving Notification of Documentation Updates
11.3
Community Resources
11.4
Trademarks
11.5
Electrostatic Discharge Caution
11.6
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
Y|0
Thermal pad, mechanical data (Package|Pins)
Orderable Information
snosd63_oa
5
Pin Configuration and Functions
Package DBV
5-Pin SOT-23
Top View
Package D
8-Pin SOIC
Top View
Pin Functions
PIN
I/O
DESCRIPTION
NAME
LMH6624-MIL
DBV
D
–IN
4
2
I
Inverting input
+IN
3
3
I
Non-inverting input
N/C
—
1, 5, 8
––
No connection
OUT
1
6
O
Output
V–
2
4
I
Negative supply
V+
5
7
I
Positive supply