SNAS512I September   2011  – December 2017 LMK00301

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Parameter Measurement Information
    1. 8.1 Differential Voltage Measurement Terminology
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
      1. 9.2.1 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 VCC and VCCO Power Supplies
      2. 9.3.2 Clock Inputs
      3. 9.3.3 Clock Outputs
        1. 9.3.3.1 Reference Output
  10. 10Application and Implementation
    1. 10.1 Driving the Clock Inputs
    2. 10.2 Crystal Interface
    3. 10.3 Termination and Use of Clock Drivers
      1. 10.3.1 Termination for DC Coupled Differential Operation
      2. 10.3.2 Termination for AC Coupled Differential Operation
      3. 10.3.3 Termination for Single-Ended Operation
  11. 11Power Supply Recommendations
    1. 11.1 Power Supply Sequencing
    2. 11.2 Current Consumption and Power Dissipation Calculations
      1. 11.2.1 Power Dissipation Example #1: Separate Vcc and Vcco Supplies with Unused Outputs
      2. 11.2.2 Power Dissipation Example #2: Worst-Case Dissipation
    3. 11.3 Power Supply Bypassing
      1. 11.3.1 Power Supply Ripple Rejection
    4. 11.4 Thermal Management
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Revision History

Changes from H Revision (March 2016) to I Revision

  • Added and updated info to the following sections: Applications; Description; Electrical Characteristics: Current Consumption; Electrical Characteristics: HCSL Outputs; and Power Supply SequencingGo
  • Added LMK00301A orderableGo
  • Added PCIe 4.0 to Applications Go
  • Included difference between LMK00301 and LMK00301A to DescriptionGo
  • Added Device Comparison Table Go
  • Added data for Icc and Icco of LMK00301A LVDS Driver in Electrical Characteristics: Current Consumption Go
  • Added PCIe 4.0 Additive Jitter Spec in Electrical Characteristics: HCSL Outputs Go
  • Added note about specs for LMK00301 and LMK00301A in footnote (2) of Electrical CharacteristicsGo
  • Added short paragraph about LMK00301A in Power Supply SequencingGo

Changes from G Revision (May 2013) to H Revision

  • Added "Ultra-Low Additive Jitter" to document title Go
  • Added, updated, or renamed the following sections: Specifications; Detailed Description; Application and Implementation; Power Supply Recommendations; Device and Documentation Support; Mechanical, Packaging, and Ordering InformationGo
  • Changed Cin (typ) from 1 pF to 4 pF (based on updated test method) in Electrical Characteristics: Crystal Interface. Go
  • Added “Additive RMS Jitter, Integration Bandwidth 10 kHz to 20 MHz” parameter with 100 MHz and 156.25 MHz Test conditions, Typical values, Max values, and footnotes in Electrical Characteristics: LVPECL Outputs Go
  • Added “Additive RMS Jitter, Integration Bandwidth 10 kHz to 20 MHz” parameter with 100 MHz and 156.25 MHz Test conditions, Typical values, Max values, and footnotes in Electrical Characteristics: LVDS Outputs Go
  • Added footnote for VI_SE parameter in the Electrical Characteristics table.Go
  • Added new paragraph at end of Driving the Clock InputsGo
  • Changed Cin = 4 pF (typ, based on updated test method) in Crystal Interface Go
  • Added POWER SUPPLY SEQUENCINGGo

Changes from F Revision (February 2013) to G Revision

  • Changed Target Applications by adding additional applications to the second and third bullets, and removing High-Speed and Serial Interfaces from first bullet.Go
  • Changed VCM text to condition for VIH to VCM parametersGo
  • Deleted VIH min value from Electrical Characteristics Table.Go
  • Deleted VIL max value from Electrical Characteristics table.Go
  • Added VI_SE parameter and spec limits with corresponding table note to Electrical Characteristics Table.Go
  • Changed third paragraph in Driving the Clock Inputs section to include CLKin* and LVCMOS text. Revised to better correspond with information in Electrical Characteristics Table.Go
  • Changed bypass cap text to signal attenuation text of the fourth paragraph in Driving the Clock Inputs section.Go
  • Changed Single-Ended LVCMOS Input, DC Coupling with Common Mode Biasing image with revised graphic.Go
  • Added text to second paragraph of Termination for AC Coupled Differential Operation to explain graphic update to Differential LVDS Operation with AC Coupling to ReceiversGo
  • Changed graphic for Differential LVDS Operation, AC Coupling, No Biasing by the Receiver and updated caption.Go