SNVSA10B November   2013  – November 2014 LMR14006

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Continuous Conduction Mode
      2. 7.3.2 Fixed Frequency Pwm Control
      3. 7.3.3 Sleep Mode
      4. 7.3.4 Bootstrap Voltage (CB)
      5. 7.3.5 Output Voltage Setting
      6. 7.3.6 Enable (/SHDN) and VIN Under Voltage Lockout
      7. 7.3.7 Current Limit
      8. 7.3.8 Overvoltage Transient Protection
      9. 7.3.9 Thermal Shutdown
  8. 8 Applications and Implementation
    1. 8.1 Typical Applications
      1. 8.1.1 Design Requirements
      2. 8.1.2 Detailed Design Procedure
        1. 8.1.2.1 Selecting The Switching Frequency
        2. 8.1.2.2 Output Inductor Selection
        3. 8.1.2.3 Output Capacitor
        4. 8.1.2.4 Schottky Diode
        5. 8.1.2.5 Input Capacitor
        6. 8.1.2.6 Bootstrap Capacitor Selection
      3. 8.1.3 Application Performance Curves
  9. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Trademarks
    3. 9.3 Electrostatic Discharge Caution
    4. 9.4 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9 Layout

9.1 Layout Guidelines

To reduce problems with conducted noise pick up the ground side of feedback network should be connected directly to the GND pin with its own connection. The feedback network, resistors R1 and R2, should be kept close to the FB pin, and away from the inductor to minimize coupling noise into the feedback pin. The input bypass capacitor CIN must be placed close to the VIN pin. This will reduce copper trace resistance which effects input voltage ripple of the IC. The inductor L1 should be placed close to the SW pin to reduce magnetic and electrostatic noise. The output capacitor, COUT should be placed close to the junction of L1 and the diode D1. The L1, D1, and COUT trace should be as short as possible to reduce conducted and radiated noise and increase overall efficiency. The ground connection for the diode, CIN, and COUT should be as small as possible and tied to the system ground plane in only one spot (preferably at the COUT ground point) to minimize conducted noise in the system ground plane. For more detail on switching power supply layout considerations see Application Note AN-1149.