SNVSBA8A May   2019  – October 2019 LMR34206-Q1


  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1. 3.1 Simplified Schematic
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 System Characteristics
    8. 7.8 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Power-Good Flag Output
      2. 8.3.2 Enable and Start-up
      3. 8.3.3 Current Limit and Short Circuit
      4. 8.3.4 Undervoltage Lockout and Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Auto Mode
      2. 8.4.2 Forced PWM Operation
      3. 8.4.3 Dropout
      4. 8.4.4 Minimum Switch On-Time
      5. 8.4.5 Spread Spectrum Operation
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. Choosing the Switching Frequency
        2. Setting the Output Voltage
        3. Inductor Selection
        4. Output Capacitor Selection
        5. Input Capacitor Selection
        6. CBOOT
        7. VCC
        8. External UVLO
        9. Maximum Ambient Temperature
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Ground and Thermal Considerations
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Current Limit and Short Circuit

The LMR34206-Q1 incorporates valley current limit for normal overloads and for short-circuit protection. In addition the high-side power MOSFET is protected from excessive current by a peak current limit circuit. Cycle-by-cycle current limit is used for overloads, while hiccup mode is used for short circuits. Finally, a zero current detector is used on the low-side power MOSFET to implement diode emulation mode (DEM) at light loads (see Glossary).

During overloads the low-side current limit, ILIMIT, determines the maximum load current that the LMR34206-Q1 can supply. When the low-side switch turns on, the inductor current begins to ramp down. If the current does not fall below ILIMIT before the next turnon cycle, then that cycle is skipped, and the low-side MOSFET is left on until the current falls below ILIMIT. This is somewhat different than the more typical peak current limit and results in Equation 1 for the maximum load current.

Equation 1. LMR34206-Q1 Ilim3_eq3.gif


  • fSW = switching frequency
  • L = inductor value

If, during current limit, the voltage on the FB input falls below about 0.4 V due to a short circuit, the device enters into hiccup mode. In this mode the device stops switching for tHC or about 94 ms, and then goes through a normal re-start with soft start. If the short-circuit condition remains, the device runs in current limit for about 20 ms (typical) and then shuts down again. This cycle repeats, as shown in as long as the short-circuit condition persists. This mode of operation helps to reduce the temperature rise of the device during a hard short on the output. Of course the output current is greatly reduced during hiccup mode. Once the output short is removed and the hiccup delay is passed, the output voltage recovers normally as shown in Figure 12.

The high-side-current limit trips when the peak inductor current reaches ISC. This is a cycle-by-cycle current limit and does not produce any frequency or load current fold back. It is meant to protect the high-side MOSFET from excessive current. Under some conditions, such as high input voltages, this current limit may trip before the low-side protection. Under this condition, ISC determines the maximum output current. Note that ISC varies with duty cycle.

LMR34206-Q1 waveform-04-short-600ma-snvsay7.pngFigure 12. Short-Circuit Transient and Recovery