SNOS487F May 2004 – December 2016 LMS8117A
When an integrated circuit operates with an appreciable current, its junction temperature is elevated. It is important to quantify its thermal limits to achieve acceptable performance and reliability. This limit is determined by summing the individual parts consisting of a series of temperature rises from the semiconductor junction to the operating environment. A one-dimensional steady-state model of conduction heat transfer is demonstrated in Figure 27. The heat generated at the device junction flows through the die to the die attach pad, through the lead frame to the surrounding case material, to the printed-circuit board, and eventually to the ambient environment.
There are several variables that may affect the thermal resistance and in turn the need for a heat sink, which include the following.
Component variables (RθJC)
Application variables (RθCA)
The LMS8117A regulator has internal thermal shutdown to protect the device from overheating. Under all possible operating conditions, the junction temperature of the LMS8117A must be within 0°C to 125°C. A heat sink may be required depending on the maximum power dissipation and maximum ambient temperature of the application. To determine if a heat sink is required, the power dissipated by the regulator (PD) is calculated using Equation 6.
Figure 28 shows the voltages and currents which are present in the circuit.
The next parameter which must be calculated is the maximum allowable temperature rise (TR(MAX)) in Equation 8.
Using the calculated values for TR(MAX) and PD, the maximum allowable value for the junction-to-ambient thermal resistance (RθJA) can be calculated with Equation 9.
If the maximum allowable value for RθJA is found to be ≥61.4°C/W for SOT-223 package or ≥56.1°C/W for
TO-252 package, no heat sink is required because the package alone dissipates enough heat to satisfy these requirements. If the calculated value for RθJA falls below these limits, a heat sink is required.
As a design aid, Table 1 shows the value of the RθJA of SOT-223 and TO-252 for different heat sink area. The copper patterns that we used to measure these RθJA are shown Figure 29 and Figure 30. Figure 17 and Figure 18 reflect the same test results as what are in the Table 1.
Figure 19 and Figure 20 show the maximum allowable power dissipation versus ambient temperature for the SOT-223 and TO-252 device packages. Figure 21 and Figure 22 show the maximum allowable power dissipation versus copper area (in.2) for the SOT-223 and TO-252 device packages. For power enhancement techniques to be used with SOT-223 and TO-252 packages, see AN–1028 Maximum Power Enhancement Techniques for Power Packages (SNVA036).
|LAYOUT||COPPER AREA (in2)||THERMAL RESISTANCE: RθJA (°C/W)|
|TOP SIDE(1)||BOTTOM SIDE||SOT-223||T0-252|