SNVS852D June 2012 – August 2018 LMZ20502
The operation of the power good flag function is described in the diagram shown in Figure 13.
This output consists of an open drain NMOS with an Rdson of about 70 Ω. When used, the power good flag should be connected to a logic supply through a pull-up resistor. It can also be pulled-up to either VIN or VOUT, through an appropriate resistor, as desired. If this function is not needed, the PG output should be left floating. The current through this flag pin should be limited to less than 4 mA. A pull-up resistor of ≥1.5 kΩ will satisfy this requirement. When the EN input is pulled low, the PG flag output will also be forced low, assuming a valid input voltage is present at the VIN pin.