Given these conditions:

1. Select either I₁ or I₂ as the signal input pin. For this example, I₂ is used. Choosing I₁ as the reference current makes the resistor network around A₄ simpler. (Note: Current only flows into the I₁ and I₂ pins.)
2. Select the magnitude of the reference current. Since the signal (I₂) spans eight decades, set I₁ to 1μA − four decades above the minimum I₂ value, and four decades below the maximum I₂ value. (Note that the value does not have to be placed in the middle. If I₂ spanned seven decades, I₁ can set three decades above the minimum and four decades below the maximum I₂ value.) This configuration results in more swing amplitude in the negative direction, which provides more sensitivity (ΔV_O4 per ΔI₂) when the current signal decreases.
3. Use Equation 1 to calculate the expected range of log outputs at V_LOGOUT:
   Equation 22. $$\begin{gathered} \mathrm{For} {\mathrm{I}}_2=10\mathrm{m}\mathrm{A}: \\ {\mathrm{V}}_{\mathrm{L}\mathrm{O}\mathrm{G}\mathrm{O}\mathrm{U}\mathrm{T}}=0.375\times \log \left(\frac{1\mathrm{\mu }\mathrm{A}}{10\mathrm{m}\mathrm{A}}\right)=-1.5\mathrm{V} \mathrm{For} {\mathrm{I}}_2=100\mathrm{p}\mathrm{A}:{\mathrm{V}}_{\mathrm{L}\mathrm{O}\mathrm{G}\mathrm{O}\mathrm{U}\mathrm{T}}=0.375\times \log \left(\frac{1\mathrm{\mu }\mathrm{A}}{100\mathrm{p}\mathrm{A}}\right)=1.5\mathrm{V} \end{gathered}$$

   Therefore, the expected voltage range at the output of amplifier A₃ is:

   Equation 23. $-1.5\mathrm{V}\le {\mathrm{V}}_{\mathrm{L}\mathrm{O}\mathrm{G}\mathrm{O}\mathrm{U}\mathrm{T}}\le 1.5\mathrm{V}$

   This result is acceptable in a dual−supply system (V+ = 5V, V− = −5V) where the output can swing below ground, but this result does not work in a single supply 5V system. Therefore, an offset voltage must be added to the system.

4. Select an offset voltage, V_COM to use for centering the output between (V−) + 0.6V and (V+) − 0.6V, which is the full-scale output capability of the A₃ amplifier. Choosing V_COM = 2.5V, and recalculating the expected voltage output range for V_LOGOUT using Equation 2, results in:
   Equation 24. $1\mathrm{V}\le {\mathrm{V}}_{\mathrm{L}\mathrm{O}\mathrm{G}\mathrm{O}\mathrm{U}\mathrm{T}}\le 4\mathrm{V}$
5. The A₄ amplifier scales and offsets the V_LOGOUT signal for use by the ADC using the equation:
   Equation 25. ${\mathrm{V}}_{\mathrm{O}4}=-{\mathrm{G}}_{{\mathrm{A}}_4}\times {\mathrm{V}}_{\mathrm{L}\mathrm{O}\mathrm{G}\mathrm{O}\mathrm{U}\mathrm{T}}+{\mathrm{V}}_{\mathrm{O}\mathrm{F}\mathrm{F}\mathrm{S}\mathrm{E}\mathrm{T}}$

   The A₄ amplifier is specified with a rated output swing capability from (V−) +0.5V to (V+) − 0.5V.

   Therefore, choose the final A₄ output:

   Equation 26. $0.5\mathrm{V}\le {\mathrm{V}}_{\mathrm{O}4}\le 2.5\mathrm{V}$

   This output results in a 2V range for the 3V V_LOGOUT range, therefore a gain of 2/3 is needed for A₄.

6. When I₂ = 10mA, V_LOGOUT = 1V, and V_O4 = 2.5V. Using Equation 25 in step 5:
   Equation 27. $2.5\mathrm{V}=\frac{-2\mathrm{V}}{3\mathrm{V}}\times \left(1\mathrm{V}\right)+{\mathrm{V}}_{\mathrm{O}\mathrm{F}\mathrm{F}\mathrm{S}\mathrm{E}\mathrm{T}}$

   Therefore, V_OFFSET = 3.17V

   The A₄ amplifier configuration for V_O4 = −2/3(V_LOGOUT) + 3.17 is seen in Figure 7-10.

   The overall transfer function is:

   Equation 28. ${\mathrm{V}}_{\mathrm{O}4}=-0.25\times \log \left(\frac{{\mathrm{I}}_1}{{\mathrm{I}}_2}\right)+1.5\mathrm{V}$
   

   A. In single−supply configuration, V_{CM IN} must be connected to ≥ 1V.

   B. The cathode of the photodiode is returned to V_REF resulting in zero bias across the photodiode. The cathode can returned to a voltage more positive than V_{CM IN} to create a reverse bias for reducing photodiode capacitance, which increases speed.

   Figure 7-9 Single-Supply Configuration Example for Measurement Over Eight Decades

A similar process can be used to configure an external rail-to-rail output op amp, such as the OPA383. The OPA383 operational amplifier can swing down to almost 0V (for details, refer to the OPA383 data sheet), therefore the scaling factor can be approximated to be 2.5/3 and the corresponding V_OFFSET is 1.24V. Figure 7-10 shows this circuit configuration.

Figure 7-10 Operational Amplifier Configuration for Scaling and Offsetting the Output Going to ADC Stage