SBOS301C May   2004  – December 2025 LOG114

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics (±5V)
    6. 5.6 Electrical Characteristics (5V)
    7. 5.7 Typical Characteristics: VS = ±5V
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Logarithmic and Difference Amplifier
      2. 6.3.2 COM Voltage Range
      3. 6.3.3 VCM IN
      4. 6.3.4 Auxiliary Operational Amplifier
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Applications Information
      1. 7.1.1 Transfer Function
      2. 7.1.2 Input Current Range
      3. 7.1.3 Setting the Reference Current
      4. 7.1.4 Negative Input Currents
      5. 7.1.5 Voltage Inputs
      6. 7.1.6 High-Current Linearity Correction
      7. 7.1.7 Error Sources
        1. 7.1.7.1 Accuracy
        2. 7.1.7.2 Total Error
        3. 7.1.7.3 Errors RTO and RTI
        4. 7.1.7.4 Log Conformity
        5. 7.1.7.5 Individual Error Components
    2. 7.2 Typical Applications
      1. 7.2.1 Design Example for Dual-Supply Configuration
      2. 7.2.2 Design Example for Single-Supply Configuration
      3. 7.2.3 Advantages of Dual−Supply Operation
      4. 7.2.4 Log Ratio
      5. 7.2.5 Data Compression
      6. 7.2.6 3.3V Operation
      7. 7.2.7 Erbium-Doped Fiber Optic Amplifier (EDFA)
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
      2. 8.2.2 PSpice® for TI
      3. 8.2.3 TINA-TI™ (Free Software Download)
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9 Revision History

Changes from Revision B (March 2025) to Revision C (December 2025)

  • Added description of device flow information in the Specifications Go
  • Added all chips site origins (CSO) condition to the typical test conditions in the Electrical characteristics Go
  • Added different fabrication process specifications for Gain Bandwidth in the Electrical Characteristics Go
  • Added different fabrication process specifications for Slew Rate in the Electrical Characteristics Go
  • Added different fabrication process specifications for Short-Circuit Current in the Electrical Characteristics Go
  • Added different fabrication process specifications for Step Response 8nA to 240nA (Decreasing) Current in the Electrical Characteristics Go
  • Changed Step Response 8nA to 240nA (Decreasing) from 6µs to 7.6µs in the Electrical Characteristics Go
  • Added different fabrication process specifications for Step Response 10nA to 100nA (Decreasing) Current in the Electrical Characteristics Go
  • Added different fabrication process specifications for Step Response 10nA to 1µA (Decreasing) Current in the Electrical Characteristics Go
  • Added different fabrication process specifications for Quiescent Current in the Electrical Characteristics Go
  • Added all chips site origins (CSO) condition to the typical test conditions in the Electrical characteristics Go
  • Added different fabrication process specifications for Gain Bandwidth in the Electrical Characteristics Go
  • Added different fabrication process specifications for Slew Rate in the Electrical Characteristics Go
  • Added different fabrication process specifications for Short-Circuit Current in the Electrical Characteristics Go
  • Added different fabrication process specifications for Step Response 8nA to 240nA (Decreasing) Current in the Electrical Characteristics Go
  • Changed Step Response 8nA to 240nA (Decreasing) from 6µs to 7.6µs in the Electrical Characteristics Go
  • Added different fabrication process specifications for Step Response 10nA to 100nA (Decreasing) Current in the Electrical Characteristics Go
  • Added different fabrication process specifications for Step Response 10nA to 1µA (Decreasing) Current in the Electrical Characteristics Go
  • Added different fabrication process specifications for Quiescent Current in the Electrical Characteristics Go
  • Added all chips site origins (CSO) condition to the typical test conditions in the Typical Characteristics Go
  • Added A4 and A5 Gain and Phase vs Frequency, A4 and A5 Noninverting Closed-Loop Response, A4 and A5 Inverting Closed-Loop Response, A4 and A5 Capacitive Load Response curves for CSO: SHE flow in the Typical Characteristics Go
  • Added CSO: TID information to A4 and A5 Gain and Phase vs Frequency, A4 and A5 Noninverting Closed-Loop Response, A4 and A5 Inverting Closed-Loop Response, A4 and A5 Capacitive Load Response curves in the Typical Characteristics Go
  • Added Part Number flow information table to the Device Nomenclature Go

Changes from Revision A (March 2007) to Revision B (March 2025)

  • Added the Pin Configuration, Specifications, ESD Ratings, Recommended Operating Conditions, Thermal Information, Detailed Description, Typical Applications, Layout, Layout Guidelines, Device and Documentation Support, and Mechanical, Packaging, and Orderable Information sectionsGo
  • Updated the numbering format for tables, figures, and cross-references throughout the documentGo
  • Added Pin Functions tableGo
  • Added the CDM ESD ratingGo
  • Moved ESD rating from Absolute Maximum Ratings to ESD Rating.Go
  • Moved specified temperature and power-supply parameters from Electrical Characteristics to Recommended Operating Conditions Go
  • Deleted thermal resistance, θJA parameters in Electrical Characteristics and replaced with detailed thermal model parameters in Thermal Information Go
  • Updated formatting of Electrical Characteristics tableGo
  • Changed logarithmic conformity error 1nA to 100µA (5 decades) maximum spec from 0.2% to 0.3% (0.017dB to 0.026dB) in Electrical Characteristics Go
  • Changed logarithmic conformity error 100pA to 3.5mA (7.5 decades) typical spec from 0.9% to 2.2% (0.08dB to 0.19dB) in Electrical Characteristics Go
  • Changed logarithmic conformity error 100pA to 3.5mA (7.5 decades) (-5°C to 75°C) typical spec from 0.5% to 2.3% in Electrical Characteristics Go
  • Added test condition to current noise in in Electrical Characteristics Go
  • Consolidated BW (10µA to 1mA (ratio 1:100), 1mA to 3.5mA (ratio 1:3.5), and 3.5mA to 10mA (ratio 1:2.9)) into 10µA to 10mA (1:1k) in Electrical Characteristics Go
  • Deleted 10nA to 10µA (ratio 1:1k) and 10nA to 1mA (ratio 1:100k) step response specifications in Electrical CharacteristicsGo
  • Changed step response 8nA to 240nA (Increasing) from 0.7µs to 0.8µs in Electrical Characteristics Go
  • Changed step response 8nA to 240nA (Decreasing) from 1µs to 6µs in Electrical CharacteristicsGo
  • Changed step response 10nA to 1µA (Increasing) from 0.15µs to 0.25µs in Electrical Characteristics Go
  • Changed step response 10nA to 1µA (Decreasing) from 0.25µs to 4µs in Electrical Characteristics Go
  • Changed logarithmic conformity error 1nA to 100µA (5 decades) maximum spec from 0.25% to 0.3% (0.022dB to 0.026dB) in Electrical Characteristics Go
  • Changed logarithmic conformity error 100pA to 3.5mA (7.5 decades) typical spec from 0.9% to 2.2% (0.08dB to 0.19dB) in Electrical Characteristics Go
  • Changed logarithmic conformity error 100pA to 3.5mA (7.5 decades) (-5°C to 75°C) typical spec from 0.5% to 2.3% in Electrical Characteristics Go
  • Changed scaling factor error from 0.0.35dB to 0.035dB in Electrical Characteristics  Go
  • Changed scaling factor error from 0.035% to 1.5% in Electrical Characteristics Go
  • Added test condition to current noise in in Electrical Characteristics  Go
  • Consolidated BW (10µA to 1mA (ratio 1:100), 1mA to 3.5mA (ratio 1:3.5), and 3.5mA to 10mA (ratio 1:2.9)) into 10µA to 10mA (1:1k) in Electrical Characteristics Go
  • Deleted 10nA to 10µA (ratio 1:1k) and 10nA to 1mA (ratio 1:100k) step response specifications in Electrical Characteristics Go
  • Changed step response 8nA to 240nA (Increasing) from 0.7µs to 0.8µs in Electrical Characteristics Go
  • Changed step response 8nA to 240nA (Decreasing) from 1µs to 6µs in Electrical Characteristics Go
  • Changed step response 10nA to 100nA (Decreasing) from 2µs to 5µs in Electrical Characteristics Go
  • Changed step response 10nA to 1µA (Increasing) from 0.15µs to 0.25µs in Electrical Characteristics Go
  • Changed step response 10nA to 1µA (Decreasing) from 0.25µs to 4µs in Electrical Characteristics Go
  • Changed typical graphs: A4 and A5 Gain and Phase vs Frequency, A4 and A5 Noninverting Closed−Loop Response, A4 and A5 Inverting Closed−Loop Response, A4 and A5 Capacitive Load Response Go
  • Removed typical characteristics graphs: Log Conformity vs Temperature, 4 Decade Log Conformity vs IREF , 5 Decade Log Conformity vs IREF , 6 Decade Log Conformity vs IREF , and 8 Decade Log Conformity vs IREF Go
  • Added Auxiliary Operational Amplifier sectionGo
  • Removed suggested transistors in Example of Setting IREF figureGo
  • Changed the suggested op amps, transistors, and diodes in the Negative Input Currents sectionGo
  • Added High-Current Linearity Correction sectionGo
  • Changed the equations in the Design Example for Dual-Supply Configuration sectionGo
  • Changed Operational Amplifier Configuration for Scaling and Offsetting the Output Going to ADC Stage figureGo