SNVS764Q January   2000  – December 2017 LP2950-N , LP2951-N


  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Voltage Options
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information: LP2950-N
    5. 7.5 Thermal Information: LP2951-N
    6. 7.6 Electrical Characteristics
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Fixed Voltage Options and Programmable Voltage Version
      2. 8.3.2 High Accuracy Output Voltage
      3. 8.3.3 Low Dropout Voltage
      4. 8.3.4 Shutdown Mode
      5. 8.3.5 Error Detection Comparator Output
      6. 8.3.6 Internal Protection Circuitry
        1. Short-Circuit Protection (Current Limit)
        2. Thermal Protection
      7. 8.3.7 Enhanced Stability
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operation with 30 V ≥ VIN > VOUT(TARGET) + 1 V
      2. 8.4.2 Operation with Shutdown Control
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1  1-A Regulator with 1.2-V Dropout
        1. Design Requirements
        2. Detailed Design Procedure
          1. Output Capacitor Requirements
          2. Input Capacitor Requirements
          3. Error Detection Comparator Output
          4. Programming the Output Voltage (LP2951-N)
          5. Reducing Output Noise
        3. Application Curves
      2. 9.2.2  300-mA Regulator with 0.75-V Dropout
      3. 9.2.3  Wide Input Voltage Range Current Limiter
      4. 9.2.4  Low Drift Current Source
      5. 9.2.5  5-V Current Limiter
      6. 9.2.6  Regulator with Early Warning and Auxiliary Output
      7. 9.2.7  Latch Off When Error Flag Occurs
      8. 9.2.8  2-A Low Dropout Regulator
      9. 9.2.9  5-V Regulator with 2.5-V Sleep Function
      10. 9.2.10 Open Circuit Detector for 4 → 20-mA Current Loop
      11. 9.2.11 Regulator with State-of-Charge Indicator
      12. 9.2.12 Low Battery Disconnect
      13. 9.2.13 System Overtemperature Protection Circuit
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 WSON Mounting
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information


Layout Guidelines

For best overall performance, place all circuit components on the same side of the circuit board and as near as practical to the respective LDO pin connections. Place ground return connections to the input and output capacitor, and to the LDO ground pin as close to each other as possible, connected by a wide, component-side, copper surface. The use of vias and long traces to create LDO circuit connections is strongly discouraged and negatively affects system performance. This grounding and layout scheme minimizes inductive parasitics, and thereby reduces load-current transients, minimizes noise, and increases circuit stability.

A ground reference plane is also recommended and is either embedded in the PCB itself or located on the bottom side of the PCB opposite the components. This reference plane serves to assure accuracy of the output voltage, shield noise, and behaves similar to a thermal plane to spread (or sink) heat from the LDO device. In most applications, this ground plane is necessary to meet thermal requirements.

Layout Example

LP2950-N LP2951-N board_layout_NDP_snvs764.gif Figure 56. LP2950 Board Layout
LP2950-N LP2951-N board_layout_NGT_snvs764.gif Figure 58. LP2951 WSON Board Layout
LP2950-N LP2951-N board_layout_DGK_snvs764.gif Figure 57. LP2951 VSSOP Board Layout

WSON Mounting

The NGT (no pullback) 8-lead WSON package requires specific mounting techniques which are detailed in AN-1187 Leadless Leadframe Package (LLP). Referring to the PCB Design Recommendations section, note that the pad style which should be used with the WSON package is the NSMD (non-solder mask defined) type. Additionally, TI recommends that the PCB terminal pads to be 0.2 mm longer than the package pads to create a solder fillet to improve reliability and inspection.

The thermal dissipation of the WSON package is directly related to the printed circuit board construction and the amount of additional copper area connected to the DAP.

For the LP2951-N in the NGT 8-lead WSON package, the junction-to-case thermal rating, RθJC, is 35°C/W, where the case is the bottom of the package at the center of the DAP.

The DAP (exposed pad) on the bottom of the WSON package is connected to the die substrate with a conductive die attach adhesive. The DAP has no direct electrical (wire) connection to any of the eight pins. There is a parasitic PN junction between the die substrate and the device ground. As such, it is strongly recommend that the DAP be connected directly to the ground at device lead 4 (that is, GND). Alternately, but not recommended, the DAP may be left floating (that is, no electrical connection). The DAP must not be connected to any potential other than ground.