SLVSAW6G June 2011 – April 2024 LP2951-Q1
PRODUCTION DATA
For VOUT ≥ 5 V, a minimum of 1 μF is required. For lower VOUT, the regulator loop gain is running closer to unity gain and, thus, has lower phase margins. Consequently, a larger capacitance is needed for stability.
For VOUT = 3 V or 3.3 V, a minimum of 2.2 μF is recommended. For worst case, VOUT = 1.23 V (using the ADJ version), a minimum of 3.3 μF is recommended. COUT can be increased without limit and only improves the regulator stability and transient response. Regardless of the value, the output capacitor must have a resonant frequency greater than 500 kHz.
The minimum capacitance values given in this section are for a maximum load current of 100 mA. If the maximum expected load current is less than 100 mA, then lower values of COUT can be used. For instance, if IOUT < 10 mA, then only 0.33 μF is required for COUT. For IOUT < 1 mA, 0.1 μF is sufficient for stability requirements. Thus, for a worst-case condition of 100-mA load and VOUT = VREF = 1.235 V (representing the highest load current and lowest loop gain), a minimum COUT of 3.3 μF is recommended.
For the LP2951-Q1, no load stability is inherent in the design — a desirable feature in CMOS circuits that are put in standby (such as RAM keep-alive applications). If the LP2951-Q1 is used with external resistors to set the output voltage, a minimum load current of 1 μA is recommended through the resistor divider.