SNVS087AE October   2000  – May 2015 LP3985

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Performance Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 No-Load Stability
      2. 7.3.2 On/Off Input Operation
      3. 7.3.3 Fast On-Time
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation with VOUT(TARGET) + 0.3 V ≤ VIN ≤ 6 V
      2. 7.4.2 Operation Using the EN Pin
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 External Capacitors
        2. 8.2.2.2 Input Capacitor
        3. 8.2.2.3 Output Capacitor
        4. 8.2.2.4 Capacitor Characteristics
        5. 8.2.2.5 Noise Bypass Capacitor
        6. 8.2.2.6 Thermal Considerations
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
    3. 10.3 DSBGA Mounting
    4. 10.4 DSBGA Light Sensitivity
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11 Device and Documentation Support

11.1 Documentation Support

11.1.1 Related Documentation

For related documentation, see the following:

  • Texas Instruments Application Note AN-1187 Leadless Leadframe Package (LLP) (SNOA401).
  • Texas Instruments Application Note AN-1112 DSBGA Wafer Level Chip Scale Package (SNVA009).

11.2 Trademarks

All other trademarks are the property of their respective owners.

11.3 Electrostatic Discharge Caution

esds-image

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

11.4 Glossary

SLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.