SNOSD36A August   2017  – December 2017 LPV821

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Low-Side, Always-On Current Sense
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
    1.     Pin Functions: LPV821 DBV
    2.     Pin Functions: LPV822 DSG (Preview)
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Operating Voltage
      2. 8.3.2 Input
      3. 8.3.3 Internal Offset Correction
      4. 8.3.4 Input Offset Voltage Drift
    4. 8.4 Device Functional Modes
      1. 8.4.1 EMI Performance and Input Filtering
      2. 8.4.2 Driving Capacitive Load
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Low-Side Current Measurement
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 General Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.4 Input Offset Voltage Drift

The LPV821 operational amplifier's input voltage offset drift is defined over the entire temperature range of –40°C to 125°C. The maximum input voltage drift allows designers to calculate the worst-case input offset change over this temperature range. The maximum input voltage drift over temperature is defined using Equation 1:

Equation 1. dVOS/dT = ΔVOS / ΔT

where

  • ΔVOS = Change in input offset voltage
  • ΔT = Change in temperature (125°C - (-40°C) = 165°C)
  • dVOS/dT = Input offset voltage drift

The LPV821 datasheet maximum value for input offset voltage drift is specified for a sample size with a Cpk (process capability index) of 2.0.