The backup RAM provides a limited number of bytes of RAM that are retained during LPMx.5. This backup RAM is part of the Backup subsystem, which operates on dedicated power supply AUXVCC3. 8 bytes of backup RAM are available in this device. The backup RAM can be word-wise accessed through the registers BAKMEM0, BAKMEM1, BAKMEM2, and BAKMEM3. The backup RAM registers cannot be accessed by the CPU when the high-side SVS is disabled by software.