SLASEN5
October 2017
MSP432E401Y
PRODUCTION DATA.
1
Device Overview
1.1
Features
1.2
Applications
1.3
Description
1.4
Functional Block Diagram
2
Revision History
3
Device Characteristics
3.1
Related Products
4
Terminal Configuration and Functions
4.1
Pin Diagram
4.2
Pin Attributes
4.3
Signal Descriptions
4.4
GPIO Pin Multiplexing
4.5
Buffer Type
4.6
Connections for Unused Pins
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Recommended DC Operating Conditions
5.5
Recommended GPIO Operating Characteristics
5.6
Recommended Fast GPIO Pad Operating Conditions
5.7
Recommended Slow GPIO Pad Operating Conditions
5.8
GPIO Current Restrictions
5.9
I/O Reliability
5.10
Current Consumption
5.11
Peripheral Current Consumption
5.12
LDO Regulator Characteristics
5.13
Power Dissipation
5.14
Thermal Resistance Characteristics, 128-Pin PDT (TQFP) Package
5.15
Timing and Switching Characteristics
5.15.1
Load Conditions
5.15.2
Power Supply Sequencing
5.15.2.1
Power and Brownout
5.15.2.1.1
VDDA Levels
5.15.2.1.2
VDD Levels
5.15.2.1.3
VDDC Levels
5.15.2.1.4
VDD Glitch Response
5.15.2.1.5
VDD Droop Response
5.15.3
Reset Timing
5.15.4
Clock Specifications
5.15.4.1
PLL Specifications
5.15.4.1.1
PLL Configuration
5.15.4.2
PIOSC Specifications
5.15.4.3
Low-Frequency Oscillator Specifications
5.15.4.4
Hibernation Low-Frequency Oscillator Specifications
5.15.4.5
Main Oscillator Specifications
5.15.4.6
Main Oscillator Specification WIth ADC
5.15.4.7
System Clock Characteristics With USB Operation
5.15.5
Sleep Modes
5.15.6
Hibernation Module
5.15.7
Flash Memory
5.15.8
EEPROM
5.15.9
Input/Output Pin Characteristics
5.15.9.1
Types of I/O Pins and ESD Protection
5.15.9.1.1
Hibernate WAKE pin
5.15.9.1.2
Nonpower I/O Pins
5.15.10
External Peripheral Interface (EPI)
5.15.11
Analog-to-Digital Converter (ADC)
5.15.12
Synchronous Serial Interface (SSI)
5.15.13
Inter-Integrated Circuit (I2C) Interface
5.15.14
Ethernet Controller
5.15.14.1
DC Characteristics
5.15.14.2
Clock Characteristics for Ethernet
5.15.14.3
AC Characteristics
5.15.15
Universal Serial Bus (USB) Controller
5.15.16
Analog Comparator
5.15.17
Pulse-Width Modulator (PWM)
5.15.18
Emulation and Debug
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Arm Cortex-M4F Processor Core
6.3.1
Processor Core
6.3.2
System Timer (SysTick)
6.3.3
Nested Vectored Interrupt Controller (NVIC)
6.3.4
System Control Block (SCB)
6.3.5
Memory Protection Unit (MPU)
6.3.6
Floating-Point Unit (FPU)
6.4
On-Chip Memory
6.4.1
SRAM
6.4.2
Flash Memory
6.4.3
ROM
6.4.4
EEPROM
6.4.5
Memory Map
6.5
Peripherals
6.5.1
External Peripheral Interface (EPI)
6.5.2
Cyclical Redundancy Check (CRC)
6.5.3
Advanced Encryption Standard (AES) Accelerator
6.5.4
Data Encryption Standard (DES) Accelerator
6.5.5
Secure Hash Algorithm/Message Digest Algorithm (SHA/MD5) Accelerator
6.5.6
Serial Communications Peripherals
6.5.6.1
Ethernet MAC and PHY
6.5.6.2
Controller Area Network (CAN)
6.5.6.3
Universal Serial Bus (USB)
6.5.6.4
Universal Asynchronous Receiver/Transmitter (UART)
6.5.6.5
Inter-Integrated Circuit (I2C)
6.5.6.6
Quad Synchronous Serial Interface (QSSI)
6.5.7
System Integration
6.5.7.1
Direct Memory Access (DMA)
6.5.7.2
System Control and Clocks
6.5.7.3
Programmable Timers
6.5.7.4
Capture Compare PWM (CCP) Pins
6.5.7.5
Hibernation (HIB) Module
6.5.7.6
Watchdog Timers
6.5.7.7
Programmable GPIOs
6.5.8
Advanced Motion Control
6.5.8.1
Pulse Width Modulation (PWM)
6.5.8.2
Quadrature Encoder With Index (QEI) Module
6.5.9
Analog
6.5.9.1
ADC
6.5.9.2
Analog Comparators
6.5.10
JTAG and Arm Serial Wire Debug
6.5.11
Peripheral Memory Map
6.6
Identification
6.7
Boot Modes
7
Applications, Implementation, and Layout
7.1
System Design Guidelines
8
Device and Documentation Support
8.1
Getting Started and Next Steps
8.2
Device Nomenclature
8.3
Tools and Software
8.4
Documentation Support
8.5
Community Resources
8.6
Trademarks
8.7
Electrostatic Discharge Caution
8.8
Export Control Notice
8.9
Glossary
9
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
PDT|128
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slasen5_oa
2
Revision History
DATE
REVISION
NOTES
October 2017
*
Initial Release