SLASEN5 October 2017 MSP432E401Y
PRODUCTION DATA.
Figure 4-1 shows the pinout of the 128-pin TQFP (PDT) package.
Each GPIO signal is identified by its GPIO port unless it defaults to an alternate function on reset. In this case, the GPIO port name is followed by the default alternate function. For a complete list of functions for each pin, see Table 4-2.
Table 4-1 lists GPIO pins with special considerations. Most GPIO pins are configured as GPIOs and are high-impedance by default (GPIOAFSEL = 0, GPIODEN = 0, GPIOPDR = 0, GPIOPUR = 0, and GPIOPCTL = 0). Special consideration pins may be programed to a non-GPIO function or may have special commit controls out of reset. In addition, a POR returns these GPIOs to their original special consideration state.
GPIO PINS | DEFAULT RESET STATE | GPIOAFSEL | GPIODEN | GPIOPDR | GPIOPUR | GPIOPCTL | GPIOCR |
---|---|---|---|---|---|---|---|
PC[3:0] | JTAG/SWD | 1 | 1 | 0 | 1 | 0x1 | 0 |
PD[7] | GPIO(1) | 0 | 0 | 0 | 0 | 0x0 | 0 |
PE[7] | GPIO(1) | 0 | 0 | 0 | 0 | 0x0 | 0 |
Table 4-2 describes the pin attributes.
PIN NUMBER | SIGNAL NAME | SIGNAL TYPE(1) | BUFFER TYPE(2) | PIN MUX ENCODING | POWER SOURCE(3) | STATE AFTER RESET RELEASE(4) |
---|---|---|---|---|---|---|
1 | PD0 | I/O | LVCMOS | – | VDD | OFF |
AIN15 | I | Analog | PD0 | N/A | ||
C0o | O | LVCMOS | PD0 (5) | N/A | ||
I2C7SCL | I/O | LVCMOS | PD0 (2) | N/A | ||
SSI2XDAT1 | I/O | LVCMOS | PD0 (15) | N/A | ||
T0CCP0 | I/O | LVCMOS | PD0 (3) | N/A | ||
2 | PD1 | I/O | LVCMOS | – | VDD | OFF |
AIN14 | I | Analog | PD1 | N/A | ||
C1o | O | LVCMOS | PD1 (5) | N/A | ||
I2C7SDA | I/O | LVCMOS | PD1 (2) | N/A | ||
SSI2XDAT0 | I/O | LVCMOS | PD1 (15) | N/A | ||
T0CCP1 | I/O | LVCMOS | PD1 (3) | N/A | ||
3 | PD2 | I/O | LVCMOS | – | VDD | OFF |
AIN13 | I | Analog | PD2 | N/A | ||
C2o | O | LVCMOS | PD2 (5) | N/A | ||
I2C8SCL | I/O | LVCMOS | PD2 (2) | N/A | ||
SSI2Fss | I/O | LVCMOS | PD2 (15) | N/A | ||
T1CCP0 | I/O | LVCMOS | PD2 (3) | N/A | ||
4 | PD3 | I/O | LVCMOS | – | VDD | OFF |
AIN12 | I | Analog | PD3 | N/A | ||
I2C8SDA | I/O | LVCMOS | PD3 (2) | N/A | ||
SSI2Clk | I/O | LVCMOS | PD3 (15) | N/A | ||
T1CCP1 | I/O | LVCMOS | PD3 (3) | N/A | ||
5 | PQ0 | I/O | LVCMOS | – | VDD | OFF |
EPI0S20 | I/O | LVCMOS | PQ0 (15) | N/A | ||
SSI3Clk | I/O | LVCMOS | PQ0 (14) | N/A | ||
6 | PQ1 | I/O | LVCMOS | – | VDD | OFF |
EPI0S21 | I/O | LVCMOS | PQ1 (15) | N/A | ||
SSI3Fss | I/O | LVCMOS | PQ1 (14) | N/A | ||
7 | VDD | – | Power | Fixed | N/A | N/A |
8 | VDDA | – | Power | Fixed | N/A | N/A |
9 | VREFA+ | – | Analog | Fixed | N/A | N/A |
10 | GNDA | – | Power | Fixed | N/A | N/A |
11 | PQ2 | I/O | LVCMOS | – | VDD | OFF |
EPI0S22 | I/O | LVCMOS | PQ2 (15) | N/A | ||
SSI3XDAT0 | I/O | LVCMOS | PQ2 (14) | N/A | ||
12 | PE3 | I/O | LVCMOS | – | VDD | OFF |
AIN0 | I | Analog | PE3 | N/A | ||
U1DTR | O | LVCMOS | PE3 (1) | N/A | ||
13 | PE2 | I/O | LVCMOS | – | VDD | OFF |
AIN1 | I | Analog | PE2 | N/A | ||
U1DCD | I | LVCMOS | PE2 (1) | N/A | ||
14 | PE1 | I/O | LVCMOS | – | VDD | OFF |
AIN2 | I | Analog | PE1 | N/A | ||
U1DSR | I | LVCMOS | PE1 (1) | N/A | ||
15 | PE0 | I/O | LVCMOS | – | VDD | OFF |
AIN3 | I | Analog | PE0 | N/A | ||
U1RTS | O | LVCMOS | PE0 (1) | N/A | ||
16 | VDD | – | Power | Fixed | N/A | N/A |
17 | GND | – | Power | Fixed | N/A | N/A |
18 | PK0 | I/O | LVCMOS | – | VDD | OFF |
AIN16 | I | Analog | PK0 | N/A | ||
EPI0S0 | I/O | LVCMOS | PK0 (15) | N/A | ||
U4Rx | I | LVCMOS | PK0 (1) | N/A | ||
19 | PK1 | I/O | LVCMOS | – | VDD | OFF |
AIN17 | I | Analog | PK1 | N/A | ||
EPI0S1 | I/O | LVCMOS | PK1 (15) | N/A | ||
U4Tx | O | LVCMOS | PK1 (1) | N/A | ||
20 | PK2 | I/O | LVCMOS | – | VDD | OFF |
AIN18 | I | Analog | PK2 | N/A | ||
EPI0S2 | I/O | LVCMOS | PK2 (15) | N/A | ||
U4RTS | O | LVCMOS | PK2 (1) | N/A | ||
21 | PK3 | I/O | LVCMOS | – | VDD | OFF |
AIN19 | I | Analog | PK3 | N/A | ||
EPI0S3 | I/O | LVCMOS | PK3 (15) | N/A | ||
U4CTS | I | LVCMOS | PK3 (1) | N/A | ||
22 | PC7 | I/O | LVCMOS | – | VDD | OFF |
C0- | I | Analog | PC7 | N/A | ||
EPI0S4 | I/O | LVCMOS | PC7 (15) | N/A | ||
U5Tx | O | LVCMOS | PC7 (1) | N/A | ||
23 | PC6 | I/O | LVCMOS | – | VDD | OFF |
C0+ | I | Analog | PC6 | N/A | ||
EPI0S5 | I/O | LVCMOS | PC6 (15) | N/A | ||
U5Rx | I | LVCMOS | PC6 (1) | N/A | ||
24 | PC5 | I/O | LVCMOS | – | VDD | OFF |
C1+ | I | Analog | PC5 | N/A | ||
EPI0S6 | I/O | LVCMOS | PC5 (15) | N/A | ||
RTCCLK | O | LVCMOS | PC5 (7) | N/A | ||
U7Tx | O | LVCMOS | PC5 (1) | N/A | ||
25 | PC4 | I/O | LVCMOS | – | VDD | OFF |
C1- | I | Analog | PC4 | N/A | ||
EPI0S7 | I/O | LVCMOS | PC4 (15) | N/A | ||
U7Rx | I | LVCMOS | PC4 (1) | N/A | ||
26 | VDD | – | Power | Fixed | N/A | N/A |
27 | PQ3 | I/O | LVCMOS | – | VDD | OFF |
EPI0S23 | I/O | LVCMOS | PQ3 (15) | N/A | ||
SSI3XDAT1 | I/O | LVCMOS | PQ3 (14) | N/A | ||
28 | VDD | – | Power | Fixed | N/A | N/A |
29 | PH0 | I/O | LVCMOS | – | VDD | OFF |
EPI0S0 | I/O | LVCMOS | PH0 (15) | N/A | ||
U0RTS | O | LVCMOS | PH0 (1) | N/A | ||
30 | PH1 | I/O | LVCMOS | – | VDD | OFF |
EPI0S1 | I/O | LVCMOS | PH1 (15) | N/A | ||
U0CTS | I | LVCMOS | PH1 (1) | N/A | ||
31 | PH2 | I/O | LVCMOS | – | VDD | OFF |
EPI0S2 | I/O | LVCMOS | PH2 (15) | N/A | ||
U0DCD | I | LVCMOS | PH2 (1) | N/A | ||
32 | PH3 | I/O | LVCMOS | – | VDD | OFF |
EPI0S3 | I/O | LVCMOS | PH3 (15) | N/A | ||
U0DSR | I | LVCMOS | PH3 (1) | N/A | ||
33 | PA0 | I/O | LVCMOS | – | VDD | OFF |
CAN0Rx | I | LVCMOS | PA0 (7) | N/A | ||
I2C9SCL | I/O | LVCMOS | PA0 (2) | N/A | ||
T0CCP0 | I/O | LVCMOS | PA0 (3) | N/A | ||
U0Rx | I | LVCMOS | PA0 (1) | N/A | ||
34 | PA1 | I/O | LVCMOS | – | VDD | OFF |
CAN0Tx | O | LVCMOS | PA1 (7) | N/A | ||
I2C9SDA | I/O | LVCMOS | PA1 (2) | N/A | ||
T0CCP1 | I/O | LVCMOS | PA1 (3) | N/A | ||
U0Tx | O | LVCMOS | PA1 (1) | N/A | ||
35 | PA2 | I/O | LVCMOS | – | VDD | OFF |
I2C8SCL | I/O | LVCMOS | PA2 (2) | N/A | ||
SSI0Clk | I/O | LVCMOS | PA2 (15) | N/A | ||
T1CCP0 | I/O | LVCMOS | PA2 (3) | N/A | ||
U4Rx | I | LVCMOS | PA2 (1) | N/A | ||
36 | PA3 | I/O | LVCMOS | – | VDD | OFF |
I2C8SDA | I/O | LVCMOS | PA3 (2) | N/A | ||
SSI0Fss | I/O | LVCMOS | PA3 (15) | N/A | ||
T1CCP1 | I/O | LVCMOS | PA3 (3) | N/A | ||
U4Tx | O | LVCMOS | PA3 (1) | N/A | ||
37 | PA4 | I/O | LVCMOS | – | VDD | OFF |
I2C7SCL | I/O | LVCMOS | PA4 (2) | N/A | ||
SSI0XDAT0 | I/O | LVCMOS | PA4 (15) | N/A | ||
T2CCP0 | I/O | LVCMOS | PA4 (3) | N/A | ||
U3Rx | I | LVCMOS | PA4 (1) | N/A | ||
38 | PA5 | I/O | LVCMOS | – | VDD | OFF |
I2C7SDA | I/O | LVCMOS | PA5 (2) | N/A | ||
SSI0XDAT1 | I/O | LVCMOS | PA5 (15) | N/A | ||
T2CCP1 | I/O | LVCMOS | PA5 (3) | N/A | ||
U3Tx | O | LVCMOS | PA5 (1) | N/A | ||
39 | VDD | – | Power | Fixed | N/A | N/A |
40 | PA6 | I/O | LVCMOS | – | VDD | OFF |
EPI0S8 | I/O | LVCMOS | PA6 (15) | N/A | ||
I2C6SCL | I/O | LVCMOS | PA6 (2) | N/A | ||
SSI0XDAT2 | I/O | LVCMOS | PA6 (13) | N/A | ||
T3CCP0 | I/O | LVCMOS | PA6 (3) | N/A | ||
U2Rx | I | LVCMOS | PA6 (1) | N/A | ||
USB0EPEN | O | LVCMOS | PA6 (5) | N/A | ||
41 | PA7 | I/O | LVCMOS | – | VDD | OFF |
EPI0S9 | I/O | LVCMOS | PA7 (15) | N/A | ||
I2C6SDA | I/O | LVCMOS | PA7 (2) | N/A | ||
SSI0XDAT3 | I/O | LVCMOS | PA7 (13) | N/A | ||
T3CCP1 | I/O | LVCMOS | PA7 (3) | N/A | ||
U2Tx | O | LVCMOS | PA7 (1) | N/A | ||
USB0EPEN | O | LVCMOS | PA7 (11) | N/A | ||
USB0PFLT | I | LVCMOS | PA7 (5) | N/A | ||
42 | PF0 | I/O | LVCMOS | – | VDD | OFF |
EN0LED0 | O | LVCMOS | PF0 (5) | N/A | ||
M0PWM0 | O | LVCMOS | PF0 (6) | N/A | ||
SSI3XDAT1 | I/O | LVCMOS | PF0 (14) | N/A | ||
TRD2 | O | LVCMOS | PF0 (15) | N/A | ||
43 | PF1 | I/O | LVCMOS | – | VDD | OFF |
EN0LED2 | O | LVCMOS | PF1 (5) | N/A | ||
M0PWM1 | O | LVCMOS | PF1 (6) | N/A | ||
SSI3XDAT0 | I/O | LVCMOS | PF1 (14) | N/A | ||
TRD1 | O | LVCMOS | PF1 (15) | N/A | ||
44 | PF2 | I/O | LVCMOS | – | VDD | OFF |
M0PWM2 | O | LVCMOS | PF2 (6) | N/A | ||
SSI3Fss | I/O | LVCMOS | PF2 (14) | N/A | ||
TRD0 | O | LVCMOS | PF2 (15) | N/A | ||
45 | PF3 | I/O | LVCMOS | – | VDD | OFF |
M0PWM3 | O | LVCMOS | PF3 (6) | N/A | ||
SSI3Clk | I/O | LVCMOS | PF3 (14) | N/A | ||
TRCLK | O | LVCMOS | PF3 (15) | N/A | ||
46 | PF4 | I/O | LVCMOS | – | VDD | OFF |
EN0LED1 | O | LVCMOS | PF4 (5) | N/A | ||
M0FAULT0 | I | LVCMOS | PF4 (6) | N/A | ||
SSI3XDAT2 | I/O | LVCMOS | PF4 (14) | N/A | ||
TRD3 | O | LVCMOS | PF4 (15) | N/A | ||
47 | VDD | – | Power | Fixed | N/A | N/A |
48 | GND | – | Power | Fixed | N/A | N/A |
49 | PG0 | I/O | LVCMOS | – | VDD | OFF |
EN0PPS | O | LVCMOS | PG0 (5) | N/A | ||
EPI0S11 | I/O | LVCMOS | PG0 (15) | N/A | ||
I2C1SCL | I/O | LVCMOS | PG0 (2) | N/A | ||
M0PWM4 | O | LVCMOS | PG0 (6) | N/A | ||
50 | PG1 | I/O | LVCMOS | – | VDD | OFF |
EPI0S10 | I/O | LVCMOS | PG1 (15) | N/A | ||
I2C1SDA | I/O | LVCMOS | PG1 (2) | N/A | ||
M0PWM5 | O | LVCMOS | PG1 (6) | N/A | ||
51 | VDD | – | Power | Fixed | N/A | N/A |
52 | VDD | – | Power | Fixed | N/A | N/A |
53 | EN0RXIN | I/O | LVCMOS | Fixed | VDD | N/A |
54 | EN0RXIP | I/O | LVCMOS | Fixed | VDD | N/A |
55 | GND | – | Power | Fixed | N/A | N/A |
56 | EN0TXON | I/O | LVCMOS | Fixed | VDD | N/A |
57 | EN0TXOP | I/O | LVCMOS | Fixed | VDD | N/A |
58 | GND | – | Power | Fixed | N/A | N/A |
59 | RBIAS | O | Analog | Fixed | VDD | N/A |
60 | PK7 | I/O | LVCMOS | – | VDD | OFF |
EPI0S24 | I/O | LVCMOS | PK7 (15) | N/A | ||
I2C4SDA | I/O | LVCMOS | PK7 (2) | N/A | ||
M0FAULT2 | I | LVCMOS | PK7 (6) | N/A | ||
RTCCLK | O | LVCMOS | PK7 (5) | N/A | ||
U0RI | I | LVCMOS | PK7 (1) | N/A | ||
61 | PK6 | I/O | LVCMOS | – | VDD | OFF |
EN0LED1 | O | LVCMOS | PK6 (5) | N/A | ||
EPI0S25 | I/O | LVCMOS | PK6 (15) | N/A | ||
I2C4SCL | I/O | LVCMOS | PK6 (2) | N/A | ||
M0FAULT1 | I | LVCMOS | PK6 (6) | N/A | ||
62 | PK5 | I/O | LVCMOS | – | VDD | OFF |
EN0LED2 | O | LVCMOS | PK5 (5) | N/A | ||
EPI0S31 | I/O | LVCMOS | PK5 (15) | N/A | ||
I2C3SDA | I/O | LVCMOS | PK5 (2) | N/A | ||
M0PWM7 | O | LVCMOS | PK5 (6) | N/A | ||
63 | PK4 | I/O | LVCMOS | – | VDD | OFF |
EN0LED0 | O | LVCMOS | PK4 (5) | N/A | ||
EPI0S32 | I/O | LVCMOS | PK4 (15) | N/A | ||
I2C3SCL | I/O | LVCMOS | PK4 (2) | N/A | ||
M0PWM6 | O | LVCMOS | PK4 (6) | N/A | ||
64 | WAKE | I | LVCMOS | Fixed | VBAT | N/A |
65 | HIB | O | LVCMOS | Fixed | VBAT | N/A |
66 | XOSC0 | I | Analog | Fixed | VBAT | N/A |
67 | XOSC1 | O | Analog | Fixed | VBAT | N/A |
68 | VBAT | – | Power | Fixed | N/A | N/A |
69 | VDD | – | Power | Fixed | N/A | N/A |
70 | RST | I | LVCMOS | Fixed | VDD | N/A |
71 | PM7 | I/O | LVCMOS | – | VDD | OFF |
T5CCP1 | I/O | LVCMOS | PM7 (3) | N/A | ||
TMPR0 | I/O | LVCMOS | PM7 | N/A | ||
U0RI | I | LVCMOS | PM7 (1) | N/A | ||
72 | PM6 | I/O | LVCMOS | – | VDD | OFF |
T5CCP0 | I/O | LVCMOS | PM6 (3) | N/A | ||
TMPR1 | I/O | LVCMOS | PM6 | N/A | ||
U0DSR | I | LVCMOS | PM6 (1) | N/A | ||
73 | PM5 | I/O | LVCMOS | – | VDD | OFF |
T4CCP1 | I/O | LVCMOS | PM5 (3) | N/A | ||
TMPR2 | I/O | LVCMOS | PM5 | N/A | ||
U0DCD | I | LVCMOS | PM5 (1) | N/A | ||
74 | PM4 | I/O | LVCMOS | – | VDD | OFF |
T4CCP0 | I/O | LVCMOS | PM4 (3) | N/A | ||
TMPR3 | I/O | LVCMOS | PM4 | N/A | ||
U0CTS | I | LVCMOS | PM4 (1) | N/A | ||
75 | PM3 | I/O | LVCMOS | – | VDD | OFF |
EPI0S12 | I/O | LVCMOS | PM3 (15) | N/A | ||
T3CCP1 | I/O | LVCMOS | PM3 (3) | N/A | ||
76 | PM2 | I/O | LVCMOS | – | VDD | OFF |
EPI0S13 | I/O | LVCMOS | PM2 (15) | N/A | ||
T3CCP0 | I/O | LVCMOS | PM2 (3) | N/A | ||
77 | PM1 | I/O | LVCMOS | – | VDD | OFF |
EPI0S14 | I/O | LVCMOS | PM1 (15) | N/A | ||
T2CCP1 | I/O | LVCMOS | PM1 (3) | N/A | ||
78 | PM0 | I/O | LVCMOS | – | VDD | OFF |
EPI0S15 | I/O | LVCMOS | PM0 (15) | N/A | ||
T2CCP0 | I/O | LVCMOS | PM0 (3) | N/A | ||
79 | VDD | – | Power | Fixed | N/A | N/A |
80 | GND | – | Power | Fixed | N/A | N/A |
81 | PL0 | I/O | LVCMOS | – | VDD | OFF |
EPI0S16 | I/O | LVCMOS | PL0 (15) | N/A | ||
I2C2SDA | I/O | LVCMOS | PL0 (2) | N/A | ||
M0FAULT3 | I | LVCMOS | PL0 (6) | N/A | ||
USB0D0 | I/O | LVCMOS | PL0 (14) | N/A | ||
82 | PL1 | I/O | LVCMOS | – | VDD | OFF |
EPI0S17 | I/O | LVCMOS | PL1 (15) | N/A | ||
I2C2SCL | I/O | LVCMOS | PL1 (2) | N/A | ||
PhA0 | I | LVCMOS | PL1 (6) | N/A | ||
USB0D1 | I/O | LVCMOS | PL1 (14) | N/A | ||
83 | PL2 | I/O | LVCMOS | – | VDD | OFF |
C0o | O | LVCMOS | PL2 (5) | N/A | ||
EPI0S18 | I/O | LVCMOS | PL2 (15) | N/A | ||
PhB0 | I | LVCMOS | PL2 (6) | N/A | ||
USB0D2 | I/O | LVCMOS | PL2 (14) | N/A | ||
84 | PL3 | I/O | LVCMOS | – | VDD | OFF |
C1o | O | LVCMOS | PL3 (5) | N/A | ||
EPI0S19 | I/O | LVCMOS | PL3 (15) | N/A | ||
IDX0 | I | LVCMOS | PL3 (6) | N/A | ||
USB0D3 | I/O | LVCMOS | PL3 (14) | N/A | ||
85 | PL4 | I/O | LVCMOS | – | VDD | OFF |
EPI0S26 | I/O | LVCMOS | PL4 (15) | N/A | ||
T0CCP0 | I/O | LVCMOS | PL4 (3) | N/A | ||
USB0D4 | I/O | LVCMOS | PL4 (14) | N/A | ||
86 | PL5 | I/O | LVCMOS | – | VDD | OFF |
EPI0S33 | I/O | LVCMOS | PL5 (15) | N/A | ||
T0CCP1 | I/O | LVCMOS | PL5 (3) | N/A | ||
USB0D5 | I/O | LVCMOS | PL5 (14) | N/A | ||
87 | VDDC | – | Power | Fixed | N/A | N/A |
88 | OSC0 | I | Analog | Fixed | VDD | N/A |
89 | OSC1 | O | Analog | Fixed | VDD | N/A |
90 | VDD | – | Power | Fixed | N/A | N/A |
91 | PB2 | I/O | LVCMOS | – | VDD | OFF |
EPI0S27 | I/O | LVCMOS | PB2 (15) | N/A | ||
I2C0SCL | I/O | LVCMOS | PB2 (2) | N/A | ||
T5CCP0 | I/O | LVCMOS | PB2 (3) | N/A | ||
USB0STP | O | LVCMOS | PB2 (14) | N/A | ||
92 | PB3 | I/O | LVCMOS | – | VDD | OFF |
EPI0S28 | I/O | LVCMOS | PB3 (15) | N/A | ||
I2C0SDA | I/O | LVCMOS | PB3 (2) | N/A | ||
T5CCP1 | I/O | LVCMOS | PB3 (3) | N/A | ||
USB0CLK | O | LVCMOS | PB3 (14) | N/A | ||
93 | PL7 | I/O | LVCMOS | – | VDD | OFF |
T1CCP1 | I/O | LVCMOS | PL7 (3) | N/A | ||
USB0DM | I/O | Analog | PL7 | N/A | ||
94 | PL6 | I/O | LVCMOS | – | VDD | OFF |
T1CCP0 | I/O | LVCMOS | PL6 (3) | N/A | ||
USB0DP | I/O | Analog | PL6 | N/A | ||
95 | PB0 | I/O | LVCMOS | – | VDD | OFF |
CAN1Rx | I | LVCMOS | PB0 (7) | N/A | ||
I2C5SCL | I/O | LVCMOS | PB0 (2) | N/A | ||
T4CCP0 | I/O | LVCMOS | PB0 (3) | N/A | ||
U1Rx | I | LVCMOS | PB0 (1) | N/A | ||
USB0ID | I | Analog | PB0 | N/A | ||
96 | PB1 | I/O | LVCMOS | – | VDD | OFF |
CAN1Tx | O | LVCMOS | PB1 (7) | N/A | ||
I2C5SDA | I/O | LVCMOS | PB1 (2) | N/A | ||
T4CCP1 | I/O | LVCMOS | PB1 (3) | N/A | ||
U1Tx | O | LVCMOS | PB1 (1) | N/A | ||
USB0VBUS | I/O | Analog | PB1 | N/A | ||
97 | PC3 | I/O | LVCMOS | – | VDD | OFF |
TDO/SWO | O | LVCMOS | PC3 (1) | PU | ||
98 | PC2 | I/O | LVCMOS | – | VDD | N/A |
TDI | I | LVCMOS | PC2 (1) | PU | ||
99 | PC1 | I/O | LVCMOS | – | VDD | OFF |
TMS/SWDIO | I/O | LVCMOS | PC1 (1) | PU | ||
100 | PC0 | I/O | LVCMOS | – | VDD | OFF |
TCK/SWCLK | I | LVCMOS | PC0 (1) | PU | ||
101 | VDD | – | Power | Fixed | N/A | N/A |
102 | PQ4 | I/O | LVCMOS | – | VDD | OFF |
DIVSCLK | O | LVCMOS | PQ4 (7) | N/A | ||
U1Rx | I | LVCMOS | PQ4 (1) | N/A | ||
103 | PP2 | I/O | LVCMOS | – | VDD | OFF |
EPI0S29 | I/O | LVCMOS | PP2 (15) | N/A | ||
U0DTR | O | LVCMOS | PP2 (1) | N/A | ||
USB0NXT | O | LVCMOS | PP2 (14) | N/A | ||
104 | PP3 | I/O | LVCMOS | – | VDD | OFF |
EPI0S30 | I/O | LVCMOS | PP3 (15) | N/A | ||
RTCCLK | O | LVCMOS | PP3 (7) | N/A | ||
U0DCD | I | LVCMOS | PP3 (2) | N/A | ||
U1CTS | I | LVCMOS | PP3 (1) | N/A | ||
USB0DIR | O | LVCMOS | PP3 (14) | N/A | ||
105 | PP4 | I/O | LVCMOS | – | VDD | OFF |
U0DSR | I | LVCMOS | PP4 (2) | N/A | ||
U3RTS | O | LVCMOS | PP4 (1) | N/A | ||
USB0D7 | I/O | LVCMOS | PP4 (14) | N/A | ||
106 | PP5 | I/O | LVCMOS | – | VDD | OFF |
I2C2SCL | I/O | LVCMOS | PP5 (2) | N/A | ||
U3CTS | I | LVCMOS | PP5 (1) | N/A | ||
USB0D6 | I/O | LVCMOS | PP5 (14) | N/A | ||
107 | PN0 | I/O | LVCMOS | – | VDD | OFF |
U1RTS | O | LVCMOS | PN0 (1) | N/A | ||
108 | PN1 | I/O | LVCMOS | – | VDD | OFF |
U1CTS | I | LVCMOS | PN1 (1) | N/A | ||
109 | PN2 | I/O | LVCMOS | – | VDD | OFF |
EPI0S29 | I/O | LVCMOS | PN2 (15) | N/A | ||
U1DCD | I | LVCMOS | PN2 (1) | N/A | ||
U2RTS | O | LVCMOS | PN2 (2) | N/A | ||
110 | PN3 | I/O | LVCMOS | – | VDD | OFF |
EPI0S30 | I/O | LVCMOS | PN3 (15) | N/A | ||
U1DSR | I | LVCMOS | PN3 (1) | N/A | ||
U2CTS | I | LVCMOS | PN3 (2) | N/A | ||
111 | PN4 | I/O | LVCMOS | – | VDD | OFF |
EPI0S34 | I/O | LVCMOS | PN4 (15) | N/A | ||
I2C2SDA | I/O | LVCMOS | PN4 (3) | N/A | ||
U1DTR | O | LVCMOS | PN4 (1) | N/A | ||
U3RTS | O | LVCMOS | PN4 (2) | N/A | ||
112 | PN5 | I/O | LVCMOS | – | VDD | OFF |
EPI0S35 | I/O | LVCMOS | PN5 (15) | N/A | ||
I2C2SCL | I/O | LVCMOS | PN5 (3) | N/A | ||
U1RI | I | LVCMOS | PN5 (1) | N/A | ||
U3CTS | I | LVCMOS | PN5 (2) | N/A | ||
113 | VDD | – | Power | Fixed | N/A | N/A |
114 | GND | – | Power | Fixed | N/A | N/A |
115 | VDDC | – | Power | Fixed | N/A | N/A |
116 | PJ0 | I/O | LVCMOS | – | VDD | OFF |
EN0PPS | O | LVCMOS | PJ0 (5) | N/A | ||
U3Rx | I | LVCMOS | PJ0 (1) | N/A | ||
117 | PJ1 | I/O | LVCMOS | – | VDD | OFF |
U3Tx | O | LVCMOS | PJ1 (1) | N/A | ||
118 | PP0 | I/O | LVCMOS | – | VDD | OFF |
C2+ | I | Analog | PP0 | N/A | ||
SSI3XDAT2 | I/O | LVCMOS | PP0 (15) | N/A | ||
U6Rx | I | LVCMOS | PP0 (1) | N/A | ||
119 | PP1 | I/O | LVCMOS | – | VDD | OFF |
C2- | I | Analog | PP1 | N/A | ||
SSI3XDAT3 | I/O | LVCMOS | PP1 (15) | N/A | ||
U6Tx | O | LVCMOS | PP1 (1) | N/A | ||
120 | PB5 | I/O | LVCMOS | – | VDD | OFF |
AIN11 | I | Analog | PB5 | N/A | ||
I2C5SDA | I/O | LVCMOS | PB5 (2) | N/A | ||
SSI1Clk | I/O | LVCMOS | PB5 (15) | N/A | ||
U0RTS | O | LVCMOS | PB5 (1) | N/A | ||
121 | PB4 | I/O | LVCMOS | – | VDD | OFF |
AIN10 | I | Analog | PB4 | N/A | ||
I2C5SCL | I/O | LVCMOS | PB4 (2) | N/A | ||
SSI1Fss | I/O | LVCMOS | PB4 (15) | N/A | ||
U0CTS | I | LVCMOS | PB4 (1) | N/A | ||
122 | VDD | – | Power | Fixed | N/A | N/A |
123 | PE4 | I/O | LVCMOS | – | VDD | OFF |
AIN9 | I | Analog | PE4 | N/A | ||
SSI1XDAT0 | I/O | LVCMOS | PE4 (15) | N/A | ||
U1RI | I | LVCMOS | PE4 (1) | N/A | ||
124 | PE5 | I/O | LVCMOS | – | VDD | OFF |
AIN8 | I | Analog | PE5 | N/A | ||
SSI1XDAT1 | I/O | LVCMOS | PE5 (15) | N/A | ||
125 | PD4 | I/O | LVCMOS | – | VDD | OFF |
AIN7 | I | Analog | PD4 | N/A | ||
SSI1XDAT2 | I/O | LVCMOS | PD4 (15) | N/A | ||
T3CCP0 | I/O | LVCMOS | PD4 (3) | N/A | ||
U2Rx | I | LVCMOS | PD4 (1) | N/A | ||
126 | PD5 | I/O | LVCMOS | – | VDD | OFF |
AIN6 | I | Analog | PD5 | N/A | ||
SSI1XDAT3 | I/O | LVCMOS | PD5 (15) | N/A | ||
T3CCP1 | I/O | LVCMOS | PD5 (3) | N/A | ||
U2Tx | O | LVCMOS | PD5 (1) | N/A | ||
127 | PD6 | I/O | LVCMOS | – | VDD | OFF |
AIN5 | I | Analog | PD6 | N/A | ||
SSI2XDAT3 | I/O | LVCMOS | PD6 (15) | N/A | ||
T4CCP0 | I/O | LVCMOS | PD6 (3) | N/A | ||
U2RTS | O | LVCMOS | PD6 (1) | N/A | ||
USB0EPEN | O | LVCMOS | PD6 (5) | N/A | ||
128 | PD7 | I/O | LVCMOS | – | VDD | OFF |
AIN4 | I | Analog | PD7 | N/A | ||
NMI | I | LVCMOS | PD7 (8) | N/A | ||
SSI2XDAT2 | I/O | LVCMOS | PD7 (15) | N/A | ||
T4CCP1 | I/O | LVCMOS | PD7 (3) | N/A | ||
U2CTS | I | LVCMOS | PD7 (1) | N/A | ||
USB0PFLT | I | LVCMOS | PD7 (5) | N/A |
Table 4-3 describes the signals. The signals are sorted by function.
FUNCTION | SIGNAL NAME | PIN NO. | PIN TYPE | DESCRIPTION |
---|---|---|---|---|
ADC | AIN0 | 12 | I |
Analog-to-digital converter input 0. |
AIN1 | 13 | I | Analog-to-digital converter input 1 | |
AIN2 | 14 | I | Analog-to-digital converter input 2 | |
AIN3 | 15 | I | Analog-to-digital converter input 3 | |
AIN4 | 128 | I | Analog-to-digital converter input 4 | |
AIN5 | 127 | I | Analog-to-digital converter input 5 | |
AIN6 | 126 | I | Analog-to-digital converter input 6 | |
AIN7 | 125 | I | Analog-to-digital converter input 7 | |
AIN8 | 124 | I | Analog-to-digital converter input 8 | |
AIN9 | 123 | I | Analog-to-digital converter input 9 | |
AIN10 | 121 | I | Analog-to-digital converter input 10 | |
AIN11 | 120 | I | Analog-to-digital converter input 11 | |
AIN12 | 4 | I | Analog-to-digital converter input 12 | |
AIN13 | 3 | I | Analog-to-digital converter input 13 | |
AIN14 | 2 | I | Analog-to-digital converter input 14 | |
AIN15 | 1 | I | Analog-to-digital converter input 15 | |
AIN16 | 18 | I | Analog-to-digital converter input 16 | |
AIN17 | 19 | I | Analog-to-digital converter input 17 | |
AIN18 | 20 | I | Analog-to-digital converter input 18 | |
AIN19 | 21 | I | Analog-to-digital converter input 19 | |
VREFA+ | 9 | - | A reference voltage used to specify the voltage at which the ADC converts to a maximum value. This pin is used in conjunction with GNDA. The voltage that is applied to VREFA+ is the voltage with which an AINn signal is converted to 4095. The VREFA+ voltage is limited to the range specified in the ADC electrical specifications. | |
Analog Comparators | C0+ | 23 | I | Analog comparator 0 positive input |
C0- | 22 | I | Analog comparator 0 negative input | |
C0o | 1 83 |
O | Analog comparator 0 output | |
C1+ | 24 | I | Analog comparator 1 positive input | |
C1- | 25 | I | Analog comparator 1 negative input | |
C1o | 2 84 |
O | Analog comparator 1 output | |
C2+ | 118 | I | Analog comparator 2 positive input | |
C2- | 119 | I | Analog comparator 2 negative input | |
C2o | 3 | O | Analog comparator 2 output | |
Controller Area Network | CAN0Rx | 33 | I | CAN module 0 receive |
CAN0Tx | 34 | O | CAN module 0 transmit | |
CAN1Rx | 95 | I | CAN module 1 receive | |
CAN1Tx | 96 | O | CAN module 1 transmit | |
Core | TRCLK | 45 | O |
Trace clock. |
TRD0 | 44 | O |
Trace data 0. |
|
TRD1 | 43 | O |
Trace data 1. |
|
TRD2 | 42 | O |
Trace data 2. |
|
TRD3 | 46 | O |
Trace data 3. |
|
Ethernet | EN0LED0 | 42 63 |
O | Ethernet 0 LED 0 |
EN0LED1 | 46 61 |
O | Ethernet 0 LED 1 | |
EN0LED2 | 43 62 |
O | Ethernet 0 LED 2 | |
EN0PPS | 49 116 |
O | Ethernet 0 pulse-per-second (PPS) output | |
EN0RXIN | 53 | I/O | Ethernet PHY negative receive differential input | |
EN0RXIP | 54 | I/O | Ethernet PHY positive receive differential input | |
EN0TXON | 56 | I/O | Ethernet PHY negative transmit differential output | |
EN0TXOP | 57 | I/O | Ethernet PHY positive transmit differential output | |
RBIAS | 59 | O | 4.87-kΩ resistor (1% precision) for Ethernet PHY | |
External Peripheral Interface | EPI0S0 | 18 29 |
I/O | EPI module 0 signal 0 |
EPI0S1 | 19 30 |
I/O | EPI module 0 signal 1 | |
EPI0S2 | 20 31 |
I/O | EPI module 0 signal 2 | |
EPI0S3 | 21 32 |
I/O | EPI module 0 signal 3 | |
EPI0S4 | 22 | I/O | EPI module 0 signal 4 | |
EPI0S5 | 23 | I/O | EPI module 0 signal 5 | |
EPI0S6 | 24 | I/O | EPI module 0 signal 6 | |
EPI0S7 | 25 | I/O | EPI module 0 signal 7 | |
EPI0S8 | 40 | I/O | EPI module 0 signal 8 | |
EPI0S9 | 41 | I/O | EPI module 0 signal 9 | |
EPI0S10 | 50 | I/O | EPI module 0 signal 10 | |
EPI0S11 | 49 | I/O | EPI module 0 signal 11 | |
EPI0S12 | 75 | I/O | EPI module 0 signal 12 | |
EPI0S13 | 76 | I/O | EPI module 0 signal 13 | |
EPI0S14 | 77 | I/O | EPI module 0 signal 14 | |
EPI0S15 | 78 | I/O | EPI module 0 signal 15 | |
EPI0S16 | 81 | I/O | EPI module 0 signal 16 | |
EPI0S17 | 82 | I/O | EPI module 0 signal 17 | |
EPI0S18 | 83 | I/O | EPI module 0 signal 18 | |
EPI0S19 | 84 | I/O | EPI module 0 signal 19 | |
EPI0S20 | 5 | I/O | EPI module 0 signal 20 | |
EPI0S21 | 6 | I/O | EPI module 0 signal 21 | |
EPI0S22 | 11 | I/O | EPI module 0 signal 22 | |
EPI0S23 | 27 | I/O | EPI module 0 signal 23 | |
EPI0S24 | 60 | I/O | EPI module 0 signal 24 | |
EPI0S25 | 61 | I/O | EPI module 0 signal 25 | |
EPI0S26 | 85 | I/O | EPI module 0 signal 26 | |
EPI0S27 | 91 | I/O | EPI module 0 signal 27 | |
EPI0S28 | 92 | I/O | EPI module 0 signal 28 | |
EPI0S29 | 103 109 |
I/O | EPI module 0 signal 29 | |
EPI0S30 | 104 110 |
I/O | EPI module 0 signal 30 | |
EPI0S31 | 62 | I/O | EPI module 0 signal 31 | |
EPI0S32 | 63 | I/O | EPI module 0 signal 32 | |
EPI0S33 | 86 | I/O | EPI module 0 signal 33 | |
EPI0S34 | 111 | I/O | EPI module 0 signal 34 | |
EPI0S35 | 112 | I/O | EPI module 0 signal 35 | |
General-Purpose Timers | T0CCP0 | 1 33 85 |
I/O | 16/32-Bit Timer 0 Capture/Compare/PWM 0 |
T0CCP1 | 2 34 86 |
I/O | 16/32-Bit Timer 0 Capture/Compare/PWM 1 | |
T1CCP0 | 3 35 94 |
I/O | 16/32-Bit Timer 1 Capture/Compare/PWM 0 | |
T1CCP1 | 4 36 93 |
I/O | 16/32-Bit Timer 1 Capture/Compare/PWM 1 | |
T2CCP0 | 37 78 |
I/O | 16/32-Bit Timer 2 Capture/Compare/PWM 0 | |
T2CCP1 | 38 77 |
I/O | 16/32-Bit Timer 2 Capture/Compare/PWM 1 | |
T3CCP0 | 40 76 125 |
I/O | 16/32-Bit Timer 3 Capture/Compare/PWM 0 | |
T3CCP1 | 41 75 126 |
I/O | 16/32-Bit Timer 3 Capture/Compare/PWM 1 | |
T4CCP0 | 74 95 127 |
I/O | 16/32-Bit Timer 4 Capture/Compare/PWM 0 | |
T4CCP1 | 73 96 128 |
I/O | 16/32-Bit Timer 4 Capture/Compare/PWM 1 | |
T5CCP0 | 72 91 |
I/O | 16/32-Bit Timer 5 Capture/Compare/PWM 0 | |
T5CCP1 | 71 92 |
I/O | 16/32-Bit Timer 5 Capture/Compare/PWM 1 | |
GPIO, Port A | PA0 | 33 | I/O | GPIO port A bit 0 |
PA1 | 34 | I/O | GPIO port A bit 1 | |
PA2 | 35 | I/O | GPIO port A bit 2 | |
PA3 | 36 | I/O | GPIO port A bit 3 | |
PA4 | 37 | I/O | GPIO port A bit 4 | |
PA5 | 38 | I/O | GPIO port A bit 5 | |
PA6 | 40 | I/O | GPIO port A bit 6 | |
PA7 | 41 | I/O | GPIO port A bit 7 | |
GPIO, Port B | PB0 | 95 | I/O | GPIO port B bit 0 |
PB1 | 96 | I/O | GPIO port B bit 1 | |
PB2 | 91 | I/O | GPIO port B bit 2 | |
PB3 | 92 | I/O | GPIO port B bit 3 | |
PB4 | 121 | I/O | GPIO port B bit 4 | |
PB5 | 120 | I/O | GPIO port B bit 5 | |
GPIO, Port C | PC0 | 100 | I/O | GPIO port C bit 0 |
PC1 | 99 | I/O | GPIO port C bit 1 | |
PC2 | 98 | I/O | GPIO port C bit 2 | |
PC3 | 97 | I/O | GPIO port C bit 3 | |
PC4 | 25 | I/O | GPIO port C bit 4 | |
PC5 | 24 | I/O | GPIO port C bit 5 | |
PC6 | 23 | I/O | GPIO port C bit 6 | |
PC7 | 22 | I/O | GPIO port C bit 7 | |
GPIO, Port D | PD0 | 1 | I/O | GPIO port D bit 0 |
PD1 | 2 | I/O | GPIO port D bit 1 | |
PD2 | 3 | I/O | GPIO port D bit 2 | |
PD3 | 4 | I/O | GPIO port D bit 3 | |
PD4 | 125 | I/O | GPIO port D bit 4 | |
PD5 | 126 | I/O | GPIO port D bit 5 | |
PD6 | 127 | I/O | GPIO port D bit 6 | |
PD7 | 128 | I/O | GPIO port D bit 7 | |
GPIO, Port E | PE0 | 15 | I/O | GPIO port E bit 0 |
PE1 | 14 | I/O | GPIO port E bit 1 | |
PE2 | 13 | I/O | GPIO port E bit 2 | |
PE3 | 12 | I/O | GPIO port E bit 3 | |
PE4 | 123 | I/O | GPIO port E bit 4 | |
PE5 | 124 | I/O | GPIO port E bit 5 | |
GPIO, Port F | PF0 | 42 | I/O | GPIO port F bit 0 |
PF1 | 43 | I/O | GPIO port F bit 1 | |
PF2 | 44 | I/O | GPIO port F bit 2 | |
PF3 | 45 | I/O | GPIO port F bit 3 | |
PF4 | 46 | I/O | GPIO port F bit 4 | |
GPIO, Port G | PG0 | 49 | I/O | GPIO port G bit 0 |
PG1 | 50 | I/O | GPIO port G bit 1 | |
GPIO, Port H | PH0 | 29 | I/O | GPIO port H bit 0 |
PH1 | 30 | I/O | GPIO port H bit 1 | |
PH2 | 31 | I/O | GPIO port H bit 2 | |
PH3 | 32 | I/O | GPIO port H bit 3 | |
GPIO, Port J | PJ0 | 116 | I/O | GPIO port J bit 0 |
PJ1 | 117 | I/O | GPIO port J bit 1 | |
GPIO, Port K | PK0 | 18 | I/O | GPIO port K bit 0 |
PK1 | 19 | I/O | GPIO port K bit 1 | |
PK2 | 20 | I/O | GPIO port K bit 2 | |
PK3 | 21 | I/O | GPIO port K bit 3 | |
PK4 | 63 | I/O | GPIO port K bit 4 | |
PK5 | 62 | I/O | GPIO port K bit 5 | |
PK6 | 61 | I/O | GPIO port K bit 6 | |
PK7 | 60 | I/O | GPIO port K bit 7 | |
GPIO, Port L | PL0 | 81 | I/O | GPIO port L bit 0 |
PL1 | 82 | I/O | GPIO port L bit 1 | |
PL2 | 83 | I/O | GPIO port L bit 2 | |
PL3 | 84 | I/O | GPIO port L bit 3 | |
PL4 | 85 | I/O | GPIO port L bit 4 | |
PL5 | 86 | I/O | GPIO port L bit 5 | |
PL6 | 94 | I/O | GPIO port L bit 6 | |
PL7 | 93 | I/O | GPIO port L bit 7 | |
GPIO, Port M | PM0 | 78 | I/O | GPIO port M bit 0 |
PM1 | 77 | I/O | GPIO port M bit 1 | |
PM2 | 76 | I/O | GPIO port M bit 2 | |
PM3 | 75 | I/O | GPIO port M bit 3 | |
PM4 | 74 | I/O | GPIO port M bit 4 | |
PM5 | 73 | I/O | GPIO port M bit 5 | |
PM6 | 72 | I/O | GPIO port M bit 6 | |
PM7 | 71 | I/O | GPIO port M bit 7 | |
GPIO, Port N | PN0 | 107 | I/O | GPIO port N bit 0 |
PN1 | 108 | I/O | GPIO port N bit 1 | |
PN2 | 109 | I/O | GPIO port N bit 2 | |
PN3 | 110 | I/O | GPIO port N bit 3 | |
PN4 | 111 | I/O | GPIO port N bit 4 | |
PN5 | 112 | I/O | GPIO port N bit 5 | |
GPIO, Port P | PP0 | 118 | I/O | GPIO port P bit 0 |
PP1 | 119 | I/O | GPIO port P bit 1 | |
PP2 | 103 | I/O | GPIO port P bit 2 | |
PP3 | 104 | I/O | GPIO port P bit 3 | |
PP4 | 105 | I/O | GPIO port P bit 4 | |
PP5 | 106 | I/O | GPIO port P bit 5 | |
GPIO, Port Q | PQ0 | 5 | I/O | GPIO port Q bit 0 |
PQ1 | 6 | I/O | GPIO port Q bit 1 | |
PQ2 | 11 | I/O | GPIO port Q bit 2 | |
PQ3 | 27 | I/O | GPIO port Q bit 3 | |
PQ4 | 102 | I/O | GPIO port Q bit 4 | |
Hibernate | HIB | 65 | O | An output that indicates the processor is in Hibernate mode |
RTCCLK | 24 60 104 |
O | Buffered version of the Hibernation module's 32.768-kHz clock. This signal is not output when the part is in Hibernate mode and before being configured after power-on reset. | |
TMPR0 | 71 | I/O | Tamper signal 0 | |
TMPR1 | 72 | I/O | Tamper signal 1 | |
TMPR2 | 73 | I/O | Tamper signal 2 | |
TMPR3 | 74 | I/O | Tamper signal 3 | |
VBAT | 68 | - | Power source for the Hibernation module. It is normally connected to the positive terminal of a battery and serves as the battery backup and Hibernation module power-source supply. | |
WAKE | 64 | I | An external input that brings the processor out of Hibernate mode when asserted | |
XOSC0 | 66 | I | Hibernation module oscillator crystal input or an external clock reference input. This is either a crystal or a 32.768-kHz oscillator for the Hibernation module RTC. | |
XOSC1 | 67 | O | Hibernation module oscillator crystal output. Leave unconnected when using a single-ended clock source. | |
I2C | I2C0SCL | 91 | I/O | I2C module 0 clock. This signal has an active pullup. The corresponding port pin should not be configured as open drain. |
I2C0SDA | 92 | I/O | I2C module 0 data | |
I2C1SCL | 49 | I/O | I2C module 1 clock. This signal has an active pullup. The corresponding port pin should not be configured as open drain. | |
I2C1SDA | 50 | I/O | I2C module 1 data | |
I2C2SCL | 82 106 112 |
I/O | I2C module 2 clock. This signal has an active pullup. The corresponding port pin should not be configured as open drain. | |
I2C2SDA | 81 111 |
I/O | I2C module 2 data | |
I2C3SCL | 63 | I/O | I2C module 3 clock. This signal has an active pullup. The corresponding port pin should not be configured as open drain. | |
I2C3SDA | 62 | I/O | I2C module 3 data | |
I2C4SCL | 61 | I/O | I2C module 4 clock. This signal has an active pullup. The corresponding port pin should not be configured as open drain. | |
I2C4SDA | 60 | I/O | I2C module 4 data | |
I2C5SCL | 95 121 |
I/O | I2C module 5 clock. This signal has an active pullup. The corresponding port pin should not be configured as open drain. | |
I2C5SDA | 96 120 |
I/O | I2C module 5 data | |
I2C6SCL | 40 | I/O | I2C module 6 clock. This signal has an active pullup. The corresponding port pin should not be configured as open drain. | |
I2C6SDA | 41 | I/O | I2C module 6 data | |
I2C7SCL | 1 37 |
I/O | I2C module 7 clock. This signal has an active pullup. The corresponding port pin should not be configured as open drain. | |
I2C7SDA | 2 38 |
I/O | I2C module 7 data | |
I2C8SCL | 3 35 |
I/O | I2C module 8 clock. This signal has an active pullup. The corresponding port pin should not be configured as open drain. | |
I2C8SDA | 4 36 |
I/O | I2C module 8 data | |
I2C9SCL | 33 | I/O | I2C module 9 clock. This signal has an active pullup. The corresponding port pin should not be configured as open drain | |
I2C9SDA | 34 | I/O | I2C module 9 data | |
JTAG, SWD, SWO | TCK/SWCLK | 100 | I | JTAG/SWD clock |
TDI | 98 | I | JTAG TDI | |
TDO/SWO | 97 | O | JTAG TDO and SWO | |
TMS/SWDIO | 99 | I | JTAG TMS and SWDIO | |
PWM | M0FAULT0 | 46 | I | Motion Control module 0 PWM fault 0 |
M0FAULT1 | 61 | I | Motion Control module 0 PWM fault 1 | |
M0FAULT2 | 60 | I | Motion Control module 0 PWM fault 2 | |
M0FAULT3 | 81 | I | Motion Control module 0 PWM fault 3 | |
M0PWM0 | 42 | O | Motion Control module 0 PWM 0. This signal is controlled by module 0 PWM generator 0. | |
M0PWM1 | 43 | O | Motion Control module 0 PWM 1. This signal is controlled by module 0 PWM generator 0. | |
M0PWM2 | 44 | O | Motion Control module 0 PWM 2. This signal is controlled by module 0 PWM generator 1. | |
M0PWM3 | 45 | O | Motion Control module 0 PWM 3. This signal is controlled by module 0 PWM generator 1. | |
M0PWM4 | 49 | O | Motion Control module 0 PWM 4. This signal is controlled by module 0 PWM generator 2. | |
M0PWM5 | 50 | O | Motion Control module 0 PWM 5. This signal is controlled by module 0 PWM generator 2. | |
M0PWM6 | 63 | O | Motion Control module 0 PWM 6. This signal is controlled by module 0 PWM generator 3. | |
M0PWM7 | 62 | O | Motion Control module 0 PWM 7. This signal is controlled by module 0 PWM generator 3. | |
Power | GND | 17 48 55 58 80 114 |
- | Ground reference for logic and I/O pins |
GNDA | 10 | - | The ground reference for the analog circuits (ADC, Analog Comparators, etc.). These are separated from GND to minimize the electrical noise contained on VDD from affecting the analog functions | |
VDD | 7 16 26 28 39 47 51 52 69 79 90 101 113 122 |
- |
Positive supply for I/O and some logic |
|
VDDA | 8 | - | The positive supply for the analog circuits (for example, ADC and Analog Comparators). These are separated from VDD to minimize the electrical noise contained on VDD from affecting the analog functions. VDDA pins must be supplied with a voltage that meets the specification in, regardless of system implementation | |
VDDC | 87 115 |
- |
Positive supply for most of the logic function, including the processor core and most peripherals. The voltage on this pin is 1.2 V and is supplied by the on-chip LDO. The VDDC pins should only be connected to each other and an external capacitor as specified in the LDO electrical specifications. |
|
QEI | IDX0 | 84 | I | QEI module 0 index |
PhA0 | 82 | I | QEI module 0 phase A | |
PhB0 | 83 | I | QEI module 0 phase B | |
SSI | SSI0Clk | 35 | I/O | SSI module 0 clock |
SSI0Fss | 36 | I/O | SSI module 0 frame signal | |
SSI0XDAT0 | 37 | I/O | SSI module 0 bidirectional data pin 0 (SSI0TX in Legacy SSI mode) | |
SSI0XDAT1 | 38 | I/O | SSI module 0 bidirectional data pin 1 (SSI0RX in Legacy SSI mode) | |
SSI0XDAT2 | 40 | I/O | SSI module 0 bidirectional data pin 2 | |
SSI0XDAT3 | 41 | I/O | SSI module 0 bidirectional data pin 3 | |
SSI1Clk | 120 | I/O | SSI module 1 clock | |
SSI1Fss | 121 | I/O | SSI module 1 frame signal | |
SSI1XDAT0 | 123 | I/O | SSI module 1 bidirectional data pin 0 (SSI1TX in Legacy SSI mode) | |
SSI1XDAT1 | 124 | I/O | SSI module 1 bidirectional data pin 1 (SSI1RX in Legacy SSI mode) | |
SSI1XDAT2 | 125 | I/O | SSI module 1 bidirectional data pin 2 | |
SSI1XDAT3 | 126 | I/O | SSI module 1 bidirectional data pin 3 | |
SSI2Clk | 4 | I/O | SSI module 2 clock | |
SSI2Fss | 3 | I/O | SSI module 2 frame signal | |
SSI2XDAT0 | 2 | I/O | SSI module 2 bidirectional data pin 0 (SSI2TX in Legacy SSI mode) | |
SSI2XDAT1 | 1 | I/O | SSI module 2 bidirectional data pin 1 (SSI2RX in Legacy SSI mode) | |
SSI2XDAT2 | 128 | I/O | SSI module 2 bidirectional data pin 2 | |
SSI2XDAT3 | 127 | I/O | SSI module 2 bidirectional data pin 3 | |
SSI3Clk | 5 45 |
I/O | SSI module 3 clock | |
SSI3Fss | 6 44 |
I/O | SSI module 3 frame signal | |
SSI3XDAT0 | 11 43 |
I/O | SSI module 3 bidirectional data pin 0 (SSI3TX in Legacy SSI mode) | |
SSI3XDAT1 | 27 42 |
I/O | SSI module 3 bidirectional data pin 1 (SSI3RX in Legacy SSI mode) | |
SSI3XDAT2 | 46 118 |
I/O | SSI module 3 bidirectional data pin 2 | |
SSI3XDAT3 | 119 | I/O | SSI module 3 bidirectional data pin 3 | |
System Control and Clocks | DIVSCLK | 102 | O | An optionally divided reference clock output based on a selected clock source. This signal is not synchronized to the system clock. |
NMI | 128 | I | Nonmaskable interrupt | |
OSC0 | 88 | I | Main oscillator crystal input or an external clock reference input | |
OSC1 | 89 | O | Main oscillator crystal output. Leave unconnected when using a single-ended clock source. | |
RST | 70 | I | System reset input | |
UART Module 0 | U0CTS | 30 74 121 |
I | UART module 0 Clear To Send modem flow control input signal |
U0DCD | 31 73 104 |
I | UART module 0 Data Carrier Detect modem status input signal | |
U0DSR | 32 72 105 |
I | UART module 0 Data Set Ready modem output control line | |
U0DTR | 103 | O | UART module 0 Data Terminal Ready modem status input signal | |
U0RI | 60 71 |
I | UART module 0 Ring Indicator modem status input signal | |
U0RTS | 29 120 |
O | UART module 0 Request to Send modem flow control output signal | |
U0Rx | 33 | I | UART module 0 receive | |
U0Tx | 34 | O | UART module 0 transmit | |
UART Module 1 | U1CTS | 104 108 |
I | UART module 1 Clear To Send modem flow control input signal |
U1DCD | 13 109 |
I | UART module 1 Data Carrier Detect modem status input signal | |
U1DSR | 14 110 |
I | UART module 1 Data Set Ready modem output control line | |
U1DTR | 12 111 |
O | UART module 1 Data Terminal Ready modem status input signal | |
U1RI | 112 123 |
I | UART module 1 Ring Indicator modem status input signal | |
U1RTS | 15 107 |
O | UART module 1 Request to Send modem flow control output line | |
U1Rx | 95 102 |
I |
UART module 1 receive. |
|
U1Tx | 96 | O | UART module 1 transmit | |
UART Module 2 | U2CTS | 110 128 |
I | UART module 2 Clear To Send modem flow control input signal |
U2RTS | 109 127 |
O | UART module 2 Request to Send modem flow control output line | |
U2Rx | 40 125 |
I | UART module 2 receive | |
U2Tx | 41 126 |
O | UART module 2 transmit | |
UART Module 3 | U3CTS | 106 112 |
I | UART module 3 Clear To Send modem flow control input signal |
U3RTS | 105 111 |
O | UART module 3 Request to Send modem flow control output line | |
U3Rx | 37 116 |
I | UART module 3 receive | |
U3Tx | 38 117 |
O | UART module 3 transmit | |
UART Module 4 | U4CTS | 21 | I | UART module 4 Clear To Send modem flow control input signal |
U4RTS | 20 | O | UART module 4 Request to Send modem flow control output line | |
U4Rx | 18 35 |
I | UART module 4 receive | |
U4Tx | 19 36 |
O | UART module 4 transmit | |
UART Module 5 | U5Rx | 23 | I | UART module 5 receive |
U5Tx | 22 | O | UART module 5 transmit | |
UART Module 6 | U6Rx | 118 | I | UART module 6 receive |
U6Tx | 119 | O | UART module 6 transmit | |
UART Module 7 | U7Rx | 25 | I | UART module 7 receive |
U7Tx | 24 | O | UART module 7 transmit | |
USB | USB0CLK | 92 | O | 60-MHz clock to the external PHY |
USB0D0 | 81 | I/O | USB data 0 | |
USB0D1 | 82 | I/O | USB data 1 | |
USB0D2 | 83 | I/O | USB data 2 | |
USB0D3 | 84 | I/O | USB data 3 | |
USB0D4 | 85 | I/O | USB data 4 | |
USB0D5 | 86 | I/O | USB data 5 | |
USB0D6 | 106 | I/O | USB data 6 | |
USB0D7 | 105 | I/O | USB data 7 | |
USB0DIR | 104 | O | Indicates that the external PHY is able to accept data from the USB controller | |
USB0DM | 93 | I/O | Bidirectional differential data pin (D– per USB specification) for USB0 | |
USB0DP | 94 | I/O | Bidirectional differential data pin (D+ per USB specification) for USB0 | |
USB0EPEN | 40 41 127 |
O | Optionally used in Host mode to control an external power source to supply power to the USB bus | |
USB0ID | 95 | I | This signal senses the state of the USB ID signal. The USB PHY enables an integrated pull-up, and an external element (USB connector) indicates the initial state of the USB controller (pulled down is the A side of the cable and pulled up is the B side). | |
USB0NXT | 103 | O | Asserted by the external PHY to throttle all data types | |
USB0PFLT | 41 128 |
I | Optionally used in Host mode by an external power source to indicate an error state by that power source | |
USB0STP | 91 | O | Asserted by the USB controller to signal the end of a USB transmit packet or register write operation | |
USB0VBUS | 96 | I/O | This signal is used during the session request protocol. This signal allows the USB PHY to both sense the voltage level of VBUS, and pull up VBUS momentarily during VBUS pulsing. |
Table 4-4 lists the GPIO pins and their analog and digital alternate functions. The AINx analog signals go through an isolation circuit before reaching their circuitry. These signals are configured by clearing the corresponding DEN bit in the GPIO Digital Enable (GPIODEN) register and setting the corresponding AMSEL bit in the GPIO Analog Mode Select (GPIOAMSEL) register. Other analog signals are 3.3-V tolerant and are connected directly to their circuitry (C0-, C0+, C1 -, C1+, C2-, C2+, USB0VBUS, USB0ID). These signals are configured by clearing the DEN bit in the GPIODEN register. The digital signals are enabled by setting the appropriate bit in the GPIO Alternate Function Select (GPIOAFSEL) and GPIODEN registers and configuring the PMCx bit field in the GPIO Port Control (GPIOPCTL) register to the numeric encoding shown in Table 4-4.
I/O | PIN | ANALOG OR SPECIAL FUNCTION (1) | DIGITAL FUNCTION (GPIOPCTL PMCx BIT FIELD ENCODING) | |||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 11 | 13 | 14 | 15 | |||
PA0 | 33 | – | U0Rx | I2C9SCL | T0CCP0 | – | – | – | CAN0Rx | – | – | – | – | – |
PA1 | 34 | – | U0Tx | I2C9SDA | T0CCP1 | – | – | – | CAN0Tx | – | – | – | – | – |
PA2 | 35 | – | U4Rx | I2C8SCL | T1CCP0 | – | – | – | – | – | – | – | – | SSI0Clk |
PA3 | 36 | – | U4Tx | I2C8SDA | T1CCP1 | – | – | – | – | – | – | – | – | SSI0Fss |
PA4 | 37 | – | U3Rx | I2C7SCL | T2CCP0 | – | – | – | – | – | – | – | – | SSI0XDAT0 |
PA5 | 38 | – | U3Tx | I2C7SDA | T2CCP1 | – | – | – | – | – | – | – | – | SSI0XDAT1 |
PA6 | 40 | – | U2Rx | I2C6SCL | T3CCP0 | – | USB0EPEN | – | – | – | – | SSI0XDAT2 | – | EPI0S8 |
PA7 | 41 | – | U2Tx | I2C6SDA | T3CCP1 | – | USB0PFLT | – | – | – | USB0EPEN | SSI0XDAT3 | – | EPI0S9 |
PB0 | 95 | USB0ID | U1Rx | I2C5SCL | T4CCP0 | – | – | – | CAN1Rx | – | – | – | – | – |
PB1 | 96 | USB0VBUS | U1Tx | I2C5SDA | T4CCP1 | – | – | – | CAN1Tx | – | – | – | – | – |
PB2 | 91 | – | – | I2C0SCL | T5CCP0 | – | – | – | – | – | – | – | USB0STP | EPI0S27 |
PB3 | 92 | – | – | I2C0SDA | T5CCP1 | – | – | – | – | – | – | – | USB0CLK | EPI0S28 |
PB4 | 121 | AIN10 | U0CTS | I2C5SCL | – | – | – | – | – | – | – | – | – | SSI1Fss |
PB5 | 120 | AIN11 | U0RTS | I2C5SDA | – | – | – | – | – | – | – | – | – | SSI1Clk |
PC0 | 100 | – | TCK SWCLK | – | – | – | – | – | – | – | – | – | – | – |
PC1 | 99 | – | TMS SWDIO | – | – | – | – | – | – | – | – | – | – | – |
PC2 | 98 | – | TDI | – | – | – | – | – | – | – | – | – | – | – |
PC3 | 97 | – | TDO SWO | – | – | – | – | – | – | – | – | – | – | – |
PC4 | 25 | C1- | U7Rx | – | – | – | – | – | – | – | – | – | – | EPI0S7 |
PC5 | 24 | C1+ | U7Tx | – | – | – | – | – | RTCCLK | – | – | – | – | EPI0S6 |
PC6 | 23 | C0+ | U5Rx | – | – | – | – | – | – | – | – | – | – | EPI0S5 |
PC7 | 22 | C0- | U5Tx | – | – | – | – | – | – | – | – | – | – | EPI0S4 |
PD0 | 1 | AIN15 | – | I2C7SCL | T0CCP0 | – | C0o | – | – | – | – | – | – | SSI2XDAT1 |
PD1 | 2 | AIN14 | – | I2C7SDA | T0CCP1 | – | C1o | – | – | – | – | – | – | SSI2XDAT0 |
PD2 | 3 | AIN13 | – | I2C8SCL | T1CCP0 | – | C2o | – | – | – | – | – | – | SSI2Fss |
PD3 | 4 | AIN12 | – | I2C8SDA | T1CCP1 | – | – | – | – | – | – | – | – | SSI2Clk |
PD4 | 125 | AIN7 | U2Rx | – | T3CCP0 | – | – | – | – | – | – | – | – | SSI1XDAT2 |
PD5 | 126 | AIN6 | U2Tx | – | T3CCP1 | – | – | – | – | – | – | – | – | SSI1XDAT3 |
PD6 | 127 | AIN5 | U2RTS | – | T4CCP0 | – | USB0EPEN | – | – | – | – | – | – | SSI2XDAT3 |
PD7 | 128 | AIN4 | U2CTS | – | T4CCP1 | – | USB0PFLT | – | – | NMI | – | – | – | SSI2XDAT2 |
PE0 | 15 | AIN3 | U1RTS | – | – | – | – | – | – | – | – | – | – | – |
PE1 | 14 | AIN2 | U1DSR | – | – | – | – | – | – | – | – | – | – | – |
PE2 | 13 | AIN1 | U1DCD | – | – | – | – | – | – | – | – | – | – | – |
PE3 | 12 | AIN0 | U1DTR | – | – | – | – | – | – | – | – | – | – | – |
PE4 | 123 | AIN9 | U1RI | – | – | – | – | – | – | – | – | – | – | SSI1XDAT0 |
PE5 | 124 | AIN8 | – | – | – | – | – | – | – | – | – | – | – | SSI1XDAT1 |
PF0 | 42 | – | – | – | – | – | EN0LED0 | M0PWM0 | – | – | – | – | SSI3XDAT1 | TRD2 |
PF1 | 43 | – | – | – | – | – | EN0LED2 | M0PWM1 | – | – | – | – | SSI3XDAT0 | TRD1 |
PF2 | 44 | – | – | – | – | – | – | M0PWM2 | – | – | – | – | SSI3Fss | TRD0 |
PF3 | 45 | – | – | – | – | – | – | M0PWM3 | – | – | – | – | SSI3Clk | TRCLK |
PF4 | 46 | – | – | – | – | – | EN0LED1 | M0FAULT0 | – | – | – | – | SSI3XDAT2 | TRD3 |
PG0 | 49 | – | – | I2C1SCL | – | – | EN0PPS | M0PWM4 | – | – | – | – | – | EPI0S11 |
PG1 | 50 | – | – | I2C1SDA | – | – | – | M0PWM5 | – | – | – | – | – | EPI0S10 |
PH0 | 29 | – | U0RTS | – | – | – | – | – | – | – | – | – | – | EPI0S0 |
PH1 | 30 | – | U0CTS | – | – | – | – | – | – | – | – | – | – | EPI0S1 |
PH2 | 31 | – | U0DCD | – | – | – | – | – | – | – | – | – | – | EPI0S2 |
PH3 | 32 | – | U0DSR | – | – | – | – | – | – | – | – | – | – | EPI0S3 |
PJ0 | 116 | – | U3Rx | – | – | – | EN0PPS | – | – | – | – | – | – | – |
PJ1 | 117 | – | U3Tx | – | – | – | – | – | – | – | – | – | – | – |
PK0 | 18 | AIN16 | U4Rx | – | – | – | – | – | – | – | – | – | – | EPI0S0 |
PK1 | 19 | AIN17 | U4Tx | – | – | – | – | – | – | – | – | – | – | EPI0S1 |
PK2 | 20 | AIN18 | U4RTS | – | – | – | – | – | – | – | – | – | – | EPI0S2 |
PK3 | 21 | AIN19 | U4CTS | – | – | – | – | – | – | – | – | – | – | EPI0S3 |
PK4 | 63 | – | – | I2C3SCL | – | – | EN0LED0 | M0PWM6 | – | – | – | – | – | EPI0S32 |
PK5 | 62 | – | – | I2C3SDA | – | – | EN0LED2 | M0PWM7 | – | – | – | – | – | EPI0S31 |
PK6 | 61 | – | – | I2C4SCL | – | – | EN0LED1 | M0FAULT1 | – | – | – | – | – | EPI0S25 |
PK7 | 60 | – | U0RI | I2C4SDA | – | – | RTCCLK | M0FAULT2 | – | – | – | – | – | EPI0S24 |
PL0 | 81 | – | – | I2C2SDA | – | – | – | M0FAULT3 | – | – | – | – | USB0D0 | EPI0S16 |
PL1 | 82 | – | – | I2C2SCL | – | – | – | PhA0 | – | – | – | – | USB0D1 | EPI0S17 |
PL2 | 83 | – | – | – | – | – | C0o | PhB0 | – | – | – | – | USB0D2 | EPI0S18 |
PL3 | 84 | – | – | – | – | – | C1o | IDX0 | – | – | – | – | USB0D3 | EPI0S19 |
PL4 | 85 | – | – | – | T0CCP0 | – | – | – | – | – | – | – | USB0D4 | EPI0S26 |
PL5 | 86 | – | – | – | T0CCP1 | – | – | – | – | – | – | – | USB0D5 | EPI0S33 |
PL6 | 94 | USB0DP | – | – | T1CCP0 | – | – | – | – | – | – | – | – | – |
PL7 | 93 | USB0DM | – | – | T1CCP1 | – | – | – | – | – | – | – | – | – |
PM0 | 78 | – | – | – | T2CCP0 | – | – | – | – | – | – | – | – | EPI0S15 |
PM1 | 77 | – | – | – | T2CCP1 | – | – | – | – | – | – | – | – | EPI0S14 |
PM2 | 76 | – | – | – | T3CCP0 | – | – | – | – | – | – | – | – | EPI0S13 |
PM3 | 75 | – | – | – | T3CCP1 | – | – | – | – | – | – | – | – | EPI0S12 |
PM4 | 74 | TMPR3 | U0CTS | – | T4CCP0 | – | – | – | – | – | – | – | – | – |
PM5 | 73 | TMPR2 | U0DCD | – | T4CCP1 | – | – | – | – | – | – | – | – | – |
PM6 | 72 | TMPR1 | U0DSR | – | T5CCP0 | – | – | – | – | – | – | – | – | – |
PM7 | 71 | TMPR0 | U0RI | – | T5CCP1 | – | – | – | – | – | – | – | – | – |
PN0 | 107 | – | U1RTS | – | – | – | – | – | – | – | – | – | – | – |
PN1 | 108 | – | U1CTS | – | – | – | – | – | – | – | – | – | – | – |
PN2 | 109 | – | U1DCD | U2RTS | – | – | – | – | – | – | – | – | – | EPI0S29 |
PN3 | 110 | – | U1DSR | U2CTS | – | – | – | – | – | – | – | – | – | EPI0S30 |
PN4 | 111 | – | U1DTR | U3RTS | I2C2SDA | – | – | – | – | – | – | – | – | EPI0S34 |
PN5 | 112 | – | U1RI | U3CTS | I2C2SCL | – | – | – | – | – | – | – | – | EPI0S35 |
PP0 | 118 | C2+ | U6Rx | – | – | – | – | – | – | – | – | – | – | SSI3XDAT2 |
PP1 | 119 | C2- | U6Tx | – | – | – | – | – | – | – | – | – | – | SSI3XDAT3 |
PP2 | 103 | – | U0DTR | – | – | – | – | – | – | – | – | – | USB0NXT | EPI0S29 |
PP3 | 104 | – | U1CTS | U0DCD | – | – | – | – | RTCCLK | – | – | – | USB0DIR | EPI0S30 |
PP4 | 105 | – | U3RTS | U0DSR | – | – | – | – | – | – | – | – | USB0D7 | – |
PP5 | 106 | – | U3CTS | I2C2SCL | – | – | – | – | – | – | – | – | USB0D6 | – |
PQ0 | 5 | – | – | – | – | – | – | – | – | – | – | – | SSI3Clk | EPI0S20 |
PQ1 | 6 | – | – | – | – | – | – | – | – | – | – | – | SSI3Fss | EPI0S21 |
PQ2 | 11 | – | – | – | – | – | – | – | – | – | – | – | SSI3XDAT0 | EPI0S22 |
PQ3 | 27 | – | – | – | – | – | – | – | – | – | – | – | SSI3XDAT1 | EPI0S23 |
PQ4 | 102 | – | U1Rx | – | – | – | – | – | DIVSCLK | – | – | – | – | – |
Table 4-5 describes the buffer types that are referenced in Section 4.2.
BUFFER TYPE (STANDARD) | NOMINAL VOLTAGE | HYSTERESIS | PU OR PD | NOMINAL PU OR PD STRENGTH (µA) | OUTPUT DRIVE STRENGTH (mA) | OTHER CHARACTERISTICS |
---|---|---|---|---|---|---|
Analog(2) | 3.3 V | N | N/A | N/A | N/A | See analog modules in Section 5 for details. |
LVCMOS | 3.3 V | Y(1) | Programmable | See Input/Output Pin Characteristics. | See Typical Characteristics. | |
Power (VDD)(3) | 3.3 V | N | N/A | N/A | N/A | |
Power (VDDA)(3) | 3.3 V | N | N/A | N/A | N/A | |
Power (GND and GNDA)(3) | 0 V | N | N/A | N/A | N/A |
Table 4-6 lists the recommended connections for unused pins.
Table 4-6 lists two options: an acceptable practice and a preferred practice for reduced power consumption and improved EMC characteristics. If a module is not used in a system, and its inputs are grounded, it is important that the clock to the module is never enabled by setting the corresponding bit in the RCGCx register.
FUNCTION | SIGNAL NAME | PIN NUMBER | ACCEPTABLE PRACTICE | PREFERRED PRACTICE |
---|---|---|---|---|
ADC | VREFA+ | 9 | VDDA | VDDA |
Ethernet | EN0RXIN | 53 | NC | NC |
EN0RXIP | 54 | NC | NC | |
EN0TXON | 56 | NC | NC | |
EN0TXOP | 57 | NC | NC | |
RBIAS | 59 | Connect to ground through 4.87-kΩ resistor. | Connect to ground through 4.87-kΩ resistor. | |
GPIO | PA1 (U0Tx) | 34 | NC | GND(1) |
PA4 (SSI0XDAT0) | 37 | NC | GND(2) | |
All unused GPIOs | NC | GND | ||
Hibernate | HIB | 65 | NC | NC |
VBAT | 68 | NC | VDD | |
WAKE | 64 | NC | GND | |
XOSC0 | 66 | NC | GND | |
XOSC1 |
67 |
NC | NC | |
System Control | OSC0 |
88 |
NC | GND |
OSC1 |
89 |
NC | NC | |
RST |
70 |
VDD | Pull up to VDD with 0 to 100-kΩ resistor.(3) | |
USB | USB0DM / PL7 |
93 |
NC | Pull down to GND with 1-kΩ resistor.(4) |
USB0DP / PL6 |
94 |
NC | Pull down to GND with 1-kΩ resistor.(4) |