SLASFB6 December   2025 MSPM33C321A

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Functional Block Diagram
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
    1. 6.1 Pin Diagrams
    2. 6.2 Pin Attributes
      1.      10
    3. 6.3 Signal Descriptions
      1.      12
      2.      13
      3.      14
      4.      15
      5.      16
      6.      17
      7.      18
      8.      19
      9.      20
      10.      21
      11.      22
      12.      23
      13.      24
      14.      25
      15.      26
      16.      27
    4. 6.4 Connections for Unused Pins
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Supply Current Characteristics
      1. 7.5.1 RUN/SLEEP Modes
      2. 7.5.2 STOP/STANDBY Modes
      3. 7.5.3 SHUTDOWN Mode
      4. 7.5.4 VBAT current consumption
    6. 7.6  Flash Memory Characteristics
    7. 7.7  Power Supply Sequencing
      1. 7.7.1 Power Supply Ramp
      2. 7.7.2 POR and BOR
      3. 7.7.3 VBat Characteristics
      4. 7.7.4 Timing Characteristics
    8. 7.8  Clock Specifications
      1. 7.8.1 System Oscillator (SYSOSC)
      2. 7.8.2 High Frequency Crystal/Clock
      3. 7.8.3 System Phase Lock Loop (SYSPLL)
      4. 7.8.4 Low Frequency Oscillator (LFOSC)
      5. 7.8.5 Low Frequency Crystal/Clock
    9. 7.9  Analog Specifications
      1. 7.9.1 ADC Specifications
        1. 7.9.1.1 ADC Electrical Characteristics
        2. 7.9.1.2 ADC Switching Characteristics
        3. 7.9.1.3 ADC Linearity Parameters
        4. 7.9.1.4 Typical Connection Diagram
      2. 7.9.2 COMP Specifications
        1. 7.9.2.1 Comparator Electrical Characteristics
        2. 7.9.2.2 COMP DAC Electrical Characteristics
      3. 7.9.3 VREF Specifications
        1. 7.9.3.1 VREF Voltage Characteristics
        2. 7.9.3.2 VREF Electrical Characteristics
      4. 7.9.4 Analog VBOOST Specification
        1. 7.9.4.1 Analog Mux VBOOST
      5. 7.9.5 Temperature Sensor
    10. 7.10 Serial Interface Specifications
      1. 7.10.1 UART
        1. 7.10.1.1 UART
      2. 7.10.2 I2C
        1. 7.10.2.1 I2C Characteristics
        2. 7.10.2.2 I2C Filter
        3. 7.10.2.3 I2C Timing Diagram
      3. 7.10.3 SPI
        1. 7.10.3.1 SPI
        2. 7.10.3.2 SPI Timing Diagram
      4. 7.10.4 CAN
        1. 7.10.4.1 CAN
      5. 7.10.5 QSPI
        1. 7.10.5.1 QSPI
        2. 7.10.5.2 QSPI Timing Diagram
      6. 7.10.6 I2S/TDM
        1. 7.10.6.1 Serial Audio
        2. 7.10.6.2 I2S/TDM Timing Diagram
    11. 7.11 Digital IO
    12. 7.12 TRNG
      1. 7.12.1 TRNG Electrical Characteristics
      2. 7.12.2 TRNG Switching Characteristics
    13. 7.13 Emulation and Debug
      1. 7.13.1 SWD Timing
  9. 8 Detailed Description
    1. 8.1  Arm Cortex-M33 core with TrustZone and FPU
    2. 8.2  Power Management and Clock Unit (PMCU)
      1. 8.2.1 Power Management Unit (PMU)
      2. 8.2.2 Clock Module (CKM)
      3. 8.2.3 Operating Modes
        1. 8.2.3.1 Functionality by Operating Mode
    3. 8.3  Device Memory Map
      1. 8.3.1 Memory Organization
      2. 8.3.2 Peripheral Memory Map
    4. 8.4  NVIC Interrupt Map
    5. 8.5  Embedded Flash Memory
    6. 8.6  Embedded SRAM
    7. 8.7  DMA
    8. 8.8  Event Manager
    9. 8.9  Error Aggregator Module (EAM)
    10. 8.10 GPIO
    11. 8.11 IOMUX
      1. 8.11.1 Input/Output Diagrams
    12. 8.12 Analog Modules
      1. 8.12.1 HSADC
      2. 8.12.2 COMP
      3. 8.12.3 Temperature Sensor
      4. 8.12.4 VREF
      5. 8.12.5 Device Analog Connections
    13. 8.13 Security and Cryptography
      1. 8.13.1 Global Security Controller (GSC)
      2. 8.13.2 AESADV
      3. 8.13.3 SHA256
      4. 8.13.4 Public Key Algorithm (PKA)
      5. 8.13.5 TRNG
      6. 8.13.6 Keystore
      7. 8.13.7 CRC
    14. 8.14 Serial Communication Interfaces
      1. 8.14.1 UNICOMM (UART/I2C/SPI)
        1. 8.14.1.1 UART (UNICOMM)
        2. 8.14.1.2 I2C (UNICOMM)
        3. 8.14.1.3 SPI (UNICOMM)
      2. 8.14.2 CAN-FD
      3. 8.14.3 Quad SPI (QSPI)
      4. 8.14.4 Digital Audio Interface - I2S/TDM
    15. 8.15 LFSS
    16. 8.16 Timers, RTC and Watchdogs
      1. 8.16.1 Timers (TIMx)
      2. 8.16.2 RTC_A
      3. 8.16.3 IWDT
      4. 8.16.4 WWDT
    17. 8.17 Serial Wire Debug Interface
    18. 8.18 Bootstrap Loader (BSL)
    19. 8.19 Device Factory Constants
    20. 8.20 Identification
  10. 9 Applications, Implementation, and Layout
    1. 9.1 Typical Application
      1. 9.1.1 Schematic
  11. 10Device and Documentation Support
    1. 10.1 Getting Started and Next Steps
    2. 10.2 Device Nomenclature
    3. 10.3 Tools and Software
    4. 10.4 Documentation Support
    5. 10.5 Support Resources
    6. 10.6 Trademarks
    7. 10.7 Electrostatic Discharge Caution
    8. 10.8 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.3.1 Functionality by Operating Mode

Supported functionality in each operating mode is given in Table 8-1.

Functional key:

  • EN: The function is enabled in the specified mode.
  • DIS: The function is disabled (either clock or power gated) in the specified mode, but the function's configuration is retained.
  • OPT: The function is optional in the specified mode, and remains enabled if configured to be enabled.
  • NS: The function is not automatically disabled in the specified mode, but it is not supported.
  • OFF: The function is fully powered off in the specified mode, and no configuration information is retained. When waking up from an OFF state, all module registers must be re-configured to the desired settings by application software.

Table 8-1 Supported Functionality by Operating Modes
OPERATING MODE RUN SLEEP STOP STANDBY SHUTDOWN
Oscillators SYSOSC EN OPT DIS OFF
LFOSC or LFXT EN (LFOSC or LFXT)
HFXT OPT DIS OFF
SYSPLL OPT DIS OFF
Clocks CPUCLK 160MHz DIS OFF
MCLK 160MHz DIS OFF
MCLK/2 80MHz DIS OFF
MCLK/4 (PD1) 40MHz DIS OFF
ULPCLK 40MHz 4MHz 32kHz OFF
MFCLK 4MHz
LFCLK 32 kHz OFF
HFCLK OPT DIS OFF
CANCLK OPT DIS OFF
I2SCLK OPT DIS OFF
RTCCLK OPT OPT
LFCLK Monitor OPT OPT
MCLK Monitor OPT DIS OFF
PMU POR monitor EN OFF
BOR monitor EN OFF
Core regulator FULL DRIVE FULL DRIVE REDUCED DRIVE LOW DRIVE OFF
Core Functions CPU EN DIS OFF
Flash EN DIS OFF
SRAM0 EN DIS OFF
SRAM1/2/3 EN OFF OFF
PD1 Peripherals ADC0 OPT DIS OFF
ADC1 OPT DIS OFF
AES OPT DIS OFF
CAN-FD0 OPT DIS OFF
CAN-FD1 OPT DIS OFF
CRC OPT DIS OFF
DMA0 OPT DIS OFF
DMA1 OPT DIS OFF
EVENTLP OPT DIS OFF
GSC OPT DIS OFF
I2S0 OPT DIS OFF
I2S1 OPT DIS OFF
KEYSTORE OPT DIS OFF
PKA OPT DIS OFF
QSPI OPT DIS OFF
UC2 (SPI) OPT DIS OFF
UC15_0 (I2C) OPT DIS OFF
UC15_1 (I2C) OPT DIS OFF
UC12 (UART) OPT DIS OFF
UC13_0 (UART/SPI/I2C) OPT DIS OFF
UC13_1 (UART/SPI/I2C) OPT DIS OFF
UC13_2 (UART/SPI/I2C) OPT DIS OFF
UC13_3 (UART/SPI/I2C) OPT DIS OFF
UC14 (UART/I2C) OPT DIS OFF
SHA256 OPT DIS OFF
TIMA0_0 OPT DIS OFF
TIMA0_1 OPT DIS OFF
TIMG12_0 OPT DIS OFF
TIMG4_2 OPT DIS OFF
TIMG4_3 OPT DIS OFF
TIMG8_0 OPT DIS OFF
TIMG8_1 OPT DIS OFF
TRNG OPT DIS OFF
VREF OPT DIS OFF
PD0 Peripherals COMP0 OPT OFF
COMP1 OPT OFF
UC1_0 (UART/I2C) OPT OFF
UC1_1 (UART/I2C) OPT OFF
TIMG4_0 OPT OFF
TIMG4_1 OPT OFF
WWDT OPT OFF
VBAT RTC OPT
IWDT OPT
LFXT OPT
BACKUP_REG OPT
TAMPER OPT
IOMUX and IO Wakeup EN DIS w/ WAKE
Wake Sources N/A ANY IRQ PD0 IRQ, LFSS IRQ PD0 IRQ, LFSS IRQ IOMUX, NRST, SWD