SBOS450C July   2009  – August 2014 OPA1611 , OPA1612

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Electrical Characteristics: VS = ±2.25 V to ±18 V
    5. 6.5 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power Dissipation
      2. 7.3.2 Electrical Overstress
      3. 7.3.3 Operating Voltage
      4. 7.3.4 Input Protection
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Noise Performance
      1. 8.2.1 Detailed Design Procedure
      2. 8.2.2 Application Curve
      3. 8.2.3 Basic Noise Calculations
    3. 8.3 Total Harmonic Distortion Measurements
    4. 8.4 Capacitive Loads
    5. 8.5 Application Circuit
  9. 9 Power-Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Related Links
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

D Package
OPA1611, SOIC-8
(Top View)
po_1611so_bos450.gif
D Package
OPA1612, SOIC-8
(Top View)
po_1612so_bos450.gif
DRG Package
OPA1612, SON-8
(Top View)
po_2211dfn_bos377.gif
1. NC denotes no internal connection. Pin can be left floating or connected to any voltage between (V–) and (V+).
2. Exposed thermal die pad on underside; connect thermal die pad to V–. Soldering the thermal pad improves heat dissipation and provides specified performance.

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
D (OPA1611) D (OPA1612) DRG (OPA1612)
–IN 2 — — I Inverting input
+IN 3 — — I Noninverting input
–IN A — 2 2 I Inverting input, channel A
+IN A — 3 3 I Noninverting input, channel A
–IN B — 6 6 I Inverting input, channel B
+IN B — 5 5 I Noninverting input, channel B
NC 1, 5, 8 — — — No internal connection
OUT 6 — — O Output
OUT A — 1 1 O Output, channel A
OUT B — 7 7 O Output, channel B
V– 4 4 4 — Negative (lowest) power supply
V+ 7 8 8 — Positive (highest) power supply