SLOS805C July   2012  – August 2016 OPA1662-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description Continued
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: VS = ±15 V
    6. 7.6 Electrical Characteristics: VS = 5 V
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Operating Voltage
      2. 8.3.2 Input Protection
      3. 8.3.3 Noise Performance
      4. 8.3.4 Basic Noise Calculations
      5. 8.3.5 Total Harmonic Distortion Measurements
      6. 8.3.6 Capacitive Loads
      7. 8.3.7 Electrical Overstress
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Power Dissipation
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

D and DGK Packages
8-Pin SOIC and VSSOP
Top View
OPA1662-Q1 po_1612so_bos450.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
+IN A 3 I Noninverting input channel A
–IN A 2 I Inverting input channel A
+IN B 5 I Noninverting input channel B
–IN B 6 I Inverting input channel B
OUT_A 1 O Output, channel A
OUT_B 7 O Output, channel B
V– 4 Negative (lowest) power supply
V+ 8 Positive (highest) power supply