SBOS724A September   2015  – June 2022 OPA1688

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 EMI Rejection
      2. 8.3.2 Phase-Reversal Protection
      3. 8.3.3 Capacitive Load and Stability
    4. 8.4 Device Functional Modes
      1. 8.4.1 Common-Mode Voltage Range
      2. 8.4.2 Electrical Overstress
      3. 8.4.3 Overload Recovery
  9. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Headphone Amplifier Circuit Configuration
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
        1. 12.1.1.1 PSpice® for TI
        2. 12.1.1.2 TINA-TI™ Simulation Software (Free Download)
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.6 Typical Characteristics

at VS = ±18 V, VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2, and CL = 100 pF (unless otherwise noted)

Table 7-1 List of Typical Characteristics
DESCRIPTION FIGURE
Offset Voltage Production Distribution Figure 7-1
Offset Voltage Drift Distribution Figure 7-2
Offset Voltage vs Temperature (VS = ±18 V) Figure 7-3
Offset Voltage vs Common-Mode Voltage (VS = ±18 V) Figure 7-4
Offset Voltage vs Common-Mode Voltage (Upper Stage) Figure 7-5
Offset Voltage vs Power Supply Figure 7-6
Input Bias Current vs Common-Mode Voltage Figure 7-7
Input Bias Current vs Temperature Figure 7-8
Output Voltage Swing vs Output Current (Maximum Supply) Figure 7-9
CMRR and PSRR vs Frequency (Referred-to-Input) Figure 7-10
CMRR vs Temperature Figure 7-11
PSRR vs Temperature Figure 7-12
0.1-Hz to 10-Hz Noise Figure 7-13
Input Voltage Noise Spectral Density vs Frequency Figure 7-14
THD+N Ratio vs Frequency Figure 7-15
THD+N vs Output Amplitude Figure 7-16
THD+N vs Frequency Figure 7-17
THD+N vs Amplitude Figure 7-18
Quiescent Current vs Temperature Figure 7-19
Quiescent Current vs Supply Voltage Figure 7-20
Open-Loop Gain and Phase vs Frequency Figure 7-21
Closed-Loop Gain vs Frequency Figure 7-22
Open-Loop Gain vs Temperature Figure 7-23
Open-Loop Output Impedance vs Frequency Figure 7-24
Small-Signal Overshoot vs Capacitive Load (100-mV Output Step) Figure 7-25, Figure 7-26
Positive Overload Recovery Figure 7-27, Figure 7-28
Negative Overload Recovery Figure 7-29, Figure 7-30
Small-Signal Step Response (10 mV, G = –1) Figure 7-31
Small-Signal Step Response (10 mV, G = 1) Figure 7-32
Small-Signal Step Response (100 mV, G = –1) Figure 7-33
Small-Signal Step Response (100 mV, G = 1) Figure 7-34
Large-Signal Step Response (10 V, G = –1) Figure 7-35
Large-Signal Step Response (10 V, G = 1) Figure 7-36
Large-Signal Settling Time (10-V Positive Step) Figure 7-37
Large-Signal Settling Time (10-V Negative Step) Figure 7-38
No Phase Reversal Figure 7-39
Short-Circuit Current vs Temperature Figure 7-40
Maximum Output Voltage vs Frequency Figure 7-41
EMIRR vs Frequency Figure 7-42
Channel Separation vs Frequency Figure 7-43
GUID-BB52CBB1-6C0D-491C-97D3-1FCA35D776C0-low.png
Distribution taken from 5185 amplifiers
Figure 7-1 Offset Voltage Production Distribution
GUID-ABC6C653-68FE-445A-BF64-643A8A491383-low.png
5 typical units shown, VS = ±18 V
Figure 7-3 Offset Voltage vs Temperature
GUID-2EE63AA6-D551-458E-8A13-5E19D5F03C8E-low.png
5 typical units shown, VS = ±18 V
Figure 7-5 Offset Voltage vs Common-Mode Voltage (Upper Stage)
GUID-C06B0C78-6414-46D3-A335-05FC14DAF0F5-low.png
TA = 25°C
Figure 7-7 Input Bias Current vs Common-Mode Voltage
GUID-1BAA61C3-FFD9-495C-A0A3-34508C6F1B2A-low.gif
 
Figure 7-9 Output Voltage Swing vs Output Current (Maximum Supply)
GUID-32BFFBB3-8841-44AA-91FE-B81C2C1A73B8-low.png
 
Figure 7-11 CMRR vs Temperature
GUID-C04223DD-0114-41FE-A75B-E8B0A2ACF2A2-low.png
Peak-to-peak noise = 1.70 µVPP
Figure 7-13 0.1-Hz to 10-Hz Noise
GUID-F8C608C5-8F15-4769-88F9-FDF4C32FCC1A-low.png
VOUT = 3.5 VRMS, BW = 50 kHz
Figure 7-15 THD+N Ratio vs Frequency
GUID-3132D010-C28B-404B-81DB-5736DBBA1B69-low.png
POUT = 10 mW, BW = 80 kHz, VS = ±5 V
Figure 7-17 THD+N vs Frequency
GUID-73E7DA37-8AAA-47BD-AB18-A59FB29B397E-low.png
 
Figure 7-19 Quiescent Current vs Temperature
GUID-CB4EFC99-B2FF-4020-9510-873E19DF8AFB-low.png
CLOAD = 15 pF
Figure 7-21 Open-Loop Gain and Phase vs Frequency
GUID-CBC03364-68A8-40EF-819F-7BC828843054-low.png
RL = 10 kΩ
Figure 7-23 Open-Loop Gain vs Temperature
GUID-9F91D838-2392-498A-8355-69E58F6D91CF-low.png
G = –1
Figure 7-25 Small-Signal Overshoot vs Capacitive Load (100‑mV Output Step)
GUID-B7B0EA8E-0CD1-47DA-A4B5-195EE08E5175-low.png
 
Figure 7-27 Positive Overload Recovery
GUID-8617D48B-CB2D-4B07-A318-313F0AB7E519-low.png
 
Figure 7-29 Negative Overload Recovery
GUID-25C16FB4-EB3F-4535-9090-68DB2C85428E-low.png
10 mV, G = –1, RL = 1 kΩ, CL = 10 pF
Figure 7-31 Small-Signal Step Response
GUID-101749DC-CAEE-4A25-B5E3-B5C974F87BB9-low.png
100 mV, G = –1, RL = 1 kΩ, CL = 10 pF
Figure 7-33 Small-Signal Step Response
GUID-367A2D10-1D14-4F6F-8DEA-FEDA14918723-low.png
10 V, G = –1, RL = 1 kΩ, CL = 10 pF
Figure 7-35 Large-Signal Step Response
GUID-558F0548-644F-431C-814E-C35A50F1AEF9-low.png
G = 1, CL = 10 pF, 0.1% settling = ±10 mV
Figure 7-37 Large-Signal Settling Time (10‑V Positive Step)
GUID-9247352D-5AFE-4909-AF99-23CEABA66820-low.png
 
Figure 7-39 No Phase Reversal
GUID-8021E92B-AD79-4D2F-BAFF-F94E001EB05F-low.png
 
Figure 7-41 Maximum Output Voltage vs Frequency
GUID-FCBE800F-8D5B-4C93-8449-72F3174D1638-low.png
 
Figure 7-43 Channel Separation vs Frequency
GUID-491C01F4-4619-4AA7-93E1-2177456D4932-low.png
Distribution taken from 47 amplifiers, TA = –40°C to +125°C
Figure 7-2 Offset Voltage Drift Production Distribution
GUID-76FB1345-2046-4A95-B902-D92F70AE6EC0-low.png
5 typical units shown, VS = ±18 V
Figure 7-4 Offset Voltage vs Common-Mode Voltage
GUID-1036322A-73C2-4066-8151-DB9E7B1E487E-low.png
5 typical units shown, VS = ±2.25 V to ±18 V
Figure 7-6 Offset Voltage vs Power Supply
GUID-4E4505FF-D9B7-4C33-91E3-76000F54DF5B-low.png
 
Figure 7-8 Input Bias Current vs Temperature
GUID-B2918036-0421-45B7-8FDE-23C3E9A61E0A-low.png
 
Figure 7-10 CMRR and PSRR vs Frequency (Referred-to-Input)
GUID-20C57431-317C-4B9B-982F-BEA219F28FA7-low.png
 
Figure 7-12 PSRR vs Temperature
GUID-B9542BAB-D15B-40DE-A5D2-552D34B5C106-low.png
 
Figure 7-14 Input Voltage Noise Spectral Density vs Frequency
GUID-2F0177F8-83A7-4E44-A962-A7A92A7D3B31-low.png
f = 1 kHz, BW = 80 kHz
Figure 7-16 THD+N vs Output Amplitude
GUID-ADE983EB-0C49-48F9-9D11-9FA3A6D648AD-low.png
f = 1 kHz, BW = 80 kHz, VS = ±5 V
Figure 7-18 THD+N vs Amplitude
GUID-B946D462-C932-4B44-B387-89A999B3C366-low.png
 
Figure 7-20 Quiescent Current vs Supply Voltage
GUID-1CE6171B-2979-4B1A-A79A-C4A1D1778D51-low.png
 
Figure 7-22 Closed-Loop Gain vs Frequency
GUID-B9E04D27-1FC6-4CF1-BC2F-A6EDBE486053-low.png
 
Figure 7-24 Open-Loop Output Impedance vs Frequency
GUID-A80CC8C6-78DA-4BED-A15A-9654C37C0851-low.png
G = 1
Figure 7-26 Small-Signal Overshoot vs Capacitive Load (100‑mV Output Step)
GUID-8E96AAE2-BF21-4A29-BD97-D9D37DA70C56-low.png
 
Figure 7-28 Positive Overload Recovery (Zoomed In)
GUID-A5087160-AA10-4E41-A318-1C8F18F53367-low.png
 
Figure 7-30 Negative Overload Recovery (Zoomed In)
GUID-A7D6F85A-D46E-4100-8E05-F215FDF90B76-low.png
10 mV, G = 1, CL = 10 pF
Figure 7-32 Small-Signal Step Response
GUID-D1BD3B56-371E-4B4C-A531-BF394B4151DE-low.png
100 mV, G = 1, CL = 10 pF
Figure 7-34 Small-Signal Step Response
GUID-6191CBF1-0D27-486C-B6CB-9493B4DC7CFB-low.png
10 V, G = 1, CL = 10 pF
Figure 7-36 Large-Signal Step Response
GUID-1EC76F0C-C0E3-4D4B-B152-966696EBD8DE-low.png
G = 1, CL = 10 pF, 0.1% settling = ±10 mV
Figure 7-38 Large-Signal Settling Time (10‑V Negative Step)
GUID-D9C683F0-E419-4A68-84E9-C4404B023259-low.png
 
Figure 7-40 Short-Circuit Current vs Temperature
GUID-F5EF9516-5B32-49C0-BE0B-D55BE9BBECE7-low.png
PRF = –10 dBm, VSUPPLY = ±18 V, VCM = 0 V
Figure 7-42 EMIRR vs Frequency