SBOS724 September   2015 OPA1688

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Device Family Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information: OPA1688
    5. 8.5 Thermal Information: OPA1689
    6. 8.6 Electrical Characteristics
    7. 8.7 Typical Characteristics: Table of Graphs
    8. 8.8 Typical Characteristics
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 EMI Rejection
      2. 9.3.2 Phase-Reversal Protection
      3. 9.3.3 Capacitive Load and Stability
    4. 9.4 Device Functional Modes
      1. 9.4.1 Common-Mode Voltage Range
      2. 9.4.2 Electrical Overstress
      3. 9.4.3 Overload Recovery
  10. 10Applications and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Development Support
        1. 13.1.1.1 TINA-TI (Free Software Download)
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Related Links
    4. 13.4 Community Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Specifications

8.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Supply voltage, VS ±20 (40, single supply) V
Signal input pins Voltage(2) Common-mode (V–) – 0.5 (V+) + 0.5 V
Differential(4) ±0.5 V
Current ±10 mA
Output short circuit(3) Continuous
Temperature Temperature range –55 150 °C
Junction temperature 150 °C
Storage, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Transient conditions that exceed these voltage ratings should be current limited to 10 mA or less.
(3) Short-circuit to ground, one amplifier per package.
(4) See the Electrical Overstress section for more information.

8.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±4000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

8.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
Supply voltage (V+ – V–) 4.5 (±2.25) 36 (±18) V
Specified temperature –40 85 °C

8.4 Thermal Information: OPA1688

THERMAL METRIC(1) OPA1688 UNIT
D (SOIC) DRG (WSON)
8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 116.1 63.2 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 69.8 63.5 °C/W
RθJB Junction-to-board thermal resistance 56.6 36.5 °C/W
ψJT Junction-to-top characterization parameter 22.5 1.4 °C/W
ψJB Junction-to-board characterization parameter 56.1 36.6 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A 6.3 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

8.5 Thermal Information: OPA1689

THERMAL METRIC(1) OPA1689 UNIT
D (SOIC) RVA (VQFN)
14 PINS 16 PINS
RθJA Junction-to-ambient thermal resistance 82.7 TBD °C/W
RθJC(top) Junction-to-case (top) thermal resistance 42.3 TBD °C/W
RθJB Junction-to-board thermal resistance 37.3 TBD °C/W
ψJT Junction-to-top characterization parameter 8.9 TBD °C/W
ψJB Junction-to-board characterization parameter 37 TBD °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A TBD °C/W

8.6 Electrical Characteristics

At TA = 25°C, VS = ±2.25 V to ±18 V, VCM = VOUT = VS / 2, and RL = 10 kΩ connected to VS / 2, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
AUDIO PERFORMANCE
THD+N Total harmonic distortion + noise G = 1, f = 1 kHz, VO = 3.5 VRMS , RL = 2 kΩ 0.00005%
–126 dB
G = 1, f = 1 kHz, VO = 3.5 VRMS , RL = 600 Ω 0.000051%
–126 dB
G = 1, f = 1 kHz, PO = 10 mW, RL = 128 Ω 0.000153%
–116 dB
G = 1, f = 1 kHz, PO = 10 mW, RL = 32 Ω 0.000357%
–109 dB
G = 1, f = 1 kHz, PO = 10 mW, RL = 16 Ω 0.000616%
–104 dB
FREQUENCY RESPONSE
GBP Gain bandwidth product G = 1 10 MHz
SR Slew rate G = 1 8 V/µs
Full-power bandwidth(1) VO = 1 VPP 1.3 MHz
Overload recovery time VIN × gain > VS 200 ns
Channel separation (dual) f = 1 kHz –120 dB
tS Settling time To 0.1%, VS = ±18 V, G = 1, 10-V step 3 µs
NOISE
En Input voltage noise f = 0.1 Hz to 10 Hz 2.5 µVPP
en Input voltage noise density(2) f = 100 Hz 14 nV/√Hz
f = 1 kHz 8
in Input current noise density f = 1 kHz 1.8 fA/√Hz
OFFSET VOLTAGE
VOS Input offset voltage TA = 25°C ±0.25 ±1.5 mV
TA = –40°C to 85°C ±1.6
dVOS/dT VOS over temperature(2) TA = –40°C to 85°C ±0.5 ±2 µV/°C
PSRR Power-supply rejection ratio TA = –40°C to 85°C ±1 ±2.5 µV/V
Channel separation, dc At dc 0.1 µV/V
INPUT BIAS CURRENT
IB Input bias current TA = 25°C ±10 ±20 pA
TA = –40°C to 85°C ±1.5 nA
IOS Input offset current TA = 25°C ±3 ±7 pA
TA = –40°C to 85°C ±250 pA
INPUT VOLTAGE RANGE
VCM Common-mode voltage range(3) (V–) – 0.1 V (V+) – 2 V V
CMRR Common-mode rejection ratio VS = ±2.25 V, (V–) – 0.1 V < VCM < (V+) – 2 V,
TA = –40°C to 85°C
90 104 dB
VS = ±18 V, (V–) – 0.1 V < VCM < (V+) – 2 V,
TA = –40°C to 85°C
104 120
INPUT IMPEDANCE
Differential 100 || 7 MΩ || pF
Common-mode 6 || 1.5 1012Ω || pF
OPEN-LOOP GAIN
AOL Open-loop voltage gain (V–) + 0.35 V < VO < (V+) – 0.35 V, RL = 10 kΩ,
TA = –40°C to 85°C
108 130 dB
(V–) + 0.5 V < VO < (V+) – 0.5 V, RL = 2 kΩ,
TA = –40°C to 85°C
118
OUTPUT
VO Voltage output swing from rail IL = ±1 mA (V–) + 0.1 V (V+) – 0.1 V mV
VS = 36 V, RL = 10 kΩ 70 90
VS = 36 V, RL = 2 kΩ 330 400
ZO Open-loop output impedance f = 1 MHz, IO = 0 A 60 Ω
ISC Short-circuit current ±75 mA
CLOAD Capacitive load drive See the Typical Characteristics pF
POWER SUPPLY
VS Specified voltage range 4.5 36 V
IQ Quiescent current per amplifier IO = 0 A 1.6 1.8 mA
IO = 0 A, TA = –40°C to 85°C 2
TEMPERATURE RANGE
Specified range –40 85 °C
Operating range –55 125 °C
(1) Full-power bandwidth = SR / (2π × VP), where SR = slew rate.
(2) Specified by design and characterization.
(3) Common-mode range can extend to the top rail with reduced performance.

8.7 Typical Characteristics: Table of Graphs

Table 1. List of Typical Characteristics

DESCRIPTION FIGURE
Offset Voltage Production Distribution Figure 1
Offset Voltage Drift Distribution Figure 2
Offset Voltage vs Temperature (VS = ±18 V) Figure 3
Offset Voltage vs Common-Mode Voltage (VS = ±18 V) Figure 4
Offset Voltage vs Common-Mode Voltage (Upper Stage) Figure 5
Offset Voltage vs Power Supply Figure 6
Input Bias Current vs Common-Mode Voltage Figure 7
Input Bias Current vs Temperature Figure 8
Output Voltage Swing vs Output Current (Maximum Supply) Figure 9
CMRR and PSRR vs Frequency (Referred-to-Input) Figure 10
CMRR vs Temperature Figure 11
PSRR vs Temperature Figure 12
0.1-Hz to 10-Hz Noise Figure 13
Input Voltage Noise Spectral Density vs Frequency Figure 14
THD+N Ratio vs Frequency Figure 15
THD+N vs Output Amplitude Figure 16
THD+N vs Frequency Figure 17
THD+N vs Amplitude Figure 18
Quiescent Current vs Temperature Figure 19
Quiescent Current vs Supply Voltage Figure 20
Open-Loop Gain and Phase vs Frequency Figure 21
Closed-Loop Gain vs Frequency Figure 22
Open-Loop Gain vs Temperature Figure 23
Open-Loop Output Impedance vs Frequency Figure 24
Small-Signal Overshoot vs Capacitive Load (100-mV Output Step) Figure 25, Figure 26
Positive Overload Recovery Figure 27, Figure 28
Negative Overload Recovery Figure 29, Figure 30
Small-Signal Step Response (10 mV, G = –1) Figure 31
Small-Signal Step Response (10 mV, G = 1) Figure 32
Small-Signal Step Response (100 mV, G = –1) Figure 33
Small-Signal Step Response (100 mV, G = 1) Figure 34
Large-Signal Step Response (10 V, G = –1) Figure 35
Large-Signal Step Response (10 V, G = 1) Figure 36
Large-Signal Settling Time (10-V Positive Step) Figure 37
Large-Signal Settling Time (10-V Negative Step) Figure 38
No Phase Reversal Figure 39
Short-Circuit Current vs Temperature Figure 40
Maximum Output Voltage vs Frequency Figure 41
EMIRR vs Frequency Figure 42
Channel Separation vs Frequency Figure 43

8.8 Typical Characteristics

VS = ±18 V, VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2, and CL = 100 pF, unless otherwise noted.
OPA1688 OPA1689 C016_OT_SBOS724.png
Distribution taken from 5185 amplifiers
Figure 1. Offset Voltage Production Distribution
OPA1688 OPA1689 C001_OT_SBOS724.png
5 typical units shown, VS = ±18 V
Figure 3. Offset Voltage vs Temperature
(VS = ±18 V)
OPA1688 OPA1689 C017_OT_SBOS724.png
5 typical units shown, VS = ±18 V
Figure 5. Offset Voltage vs Common-Mode Voltage
(Upper Stage)
OPA1688 OPA1689 C013_OT_SBOS724.png
TA = 25°C
Figure 7. Input Bias Current vs Common-Mode Voltage
OPA1688 OPA1689 C011_OT_SBOS724.gif
Figure 9. Output Voltage Swing vs Output Current (Maximum Supply)
OPA1688 OPA1689 C007_OT_SBOS724.png
Figure 11. CMRR vs Temperature
OPA1688 OPA1689 C001_SBOS724.png
Peak-to-peak noise = 1.70 µVPP
Figure 13. 0.1-Hz to 10-Hz Noise
OPA1688 OPA1689 C008_SBOS724.png
VOUT = 3.5 VRMS, BW = 50 kHz
Figure 15. THD+N Ratio vs Frequency
OPA1688 OPA1689 C028_SBOS724.png
POUT = 10 mW, BW = 80 kHz, VS = ±5 V
Figure 17. THD+N vs Frequency
OPA1688 OPA1689 C009_OT_SBOS724.png
Figure 19. Quiescent Current vs Temperature
OPA1688 OPA1689 C004_SBOS724.png
CLOAD = 15 pF
Figure 21. Open-Loop Gain and Phase vs Frequency
OPA1688 OPA1689 C008_OT_SBOS724.png
RL = 10 kΩ
Figure 23. Open-Loop Gain vs Temperature
OPA1688 OPA1689 C022_SBOS724.png
G = –1
Figure 25. Small-Signal Overshoot vs Capacitive Load
(100-mV Output Step)
OPA1688 OPA1689 C011_SBOS724.png
Figure 27. Positive Overload Recovery
OPA1688 OPA1689 C013_SBOS724.png
Figure 29. Negative Overload Recovery
OPA1688 OPA1689 C007_SBOS724.png
RL = 1 kΩ, CL = 10 pF
Figure 31. Small-Signal Step Response (10 mV, G = –1)
OPA1688 OPA1689 C006_SBOS724.png
RL = 1 kΩ, CL = 10 pF
Figure 33. Small-Signal Step Response (100 mV, G = –1)
OPA1688 OPA1689 C005_SBOS724.png
RL = 1 kΩ, CL = 10 pF
Figure 35. Large-Signal Step Response (10 V, G = –1)
OPA1688 OPA1689 C024_SBOS724.png
G = 1, CL = 10 pF, 0.1% settling = ±10 mV
Figure 37. Large-Signal Settling Time (10-V Positive Step)
OPA1688 OPA1689 C014_SBOS724.png
Figure 39. No Phase Reversal
OPA1688 OPA1689 C023_SBOS724.png
Figure 41. Maximum Output Voltage vs Frequency
OPA1688 OPA1689 C041_SBOS724.png
Figure 43. Channel Separation vs Frequency
OPA1688 OPA1689 C015_OT_SBOS724.png
Distribution taken from 47 amplifiers,
temperature = –40°C to 125°C
Figure 2. Offset Voltage Drift Production Distribution
OPA1688 OPA1689 C002_OT_SBOS724.png
5 typical units shown, VS = ±18 V
Figure 4. Offset Voltage vs Common-Mode Voltage
(VS = ±18 V)
OPA1688 OPA1689 C005_OT_SBOS724.png
5 typical units shown, VS = ±2.25 V to ±18 V
Figure 6. Offset Voltage vs Power Supply
OPA1688 OPA1689 C012_OT_SBOS724.png
Figure 8. Input Bias Current vs Temperature
OPA1688 OPA1689 C015_SBOS724.png
Figure 10. CMRR and PSRR vs Frequency
(Referred-to-Input)
OPA1688 OPA1689 C006_OT_SBOS724.png
Figure 12. PSRR vs Temperature
OPA1688 OPA1689 C002_SBOS724.png
Figure 14. Input Voltage Noise Spectral Density vs Frequency
OPA1688 OPA1689 C009_SBOS724.png
f = 1 kHz, BW = 80 kHz
Figure 16. THD+N vs Output Amplitude
OPA1688 OPA1689 C029_SBOS724.png
f = 1 kHz, BW = 80 kHz, VS = ±5 V
Figure 18. THD+N vs Amplitude
OPA1688 OPA1689 C010_OT_SBOS724.png
Figure 20. Quiescent Current vs Supply Voltage
OPA1688 OPA1689 C003_SBOS724.png
Figure 22. Closed-Loop Gain vs Frequency
OPA1688 OPA1689 C019_SBOS724.png
Figure 24. Open-Loop Output Impedance vs Frequency
OPA1688 OPA1689 C021_SBOS724.png
G = 1
Figure 26. Small-Signal Overshoot vs Capacitive Load
(100-mV Output Step)
OPA1688 OPA1689 C010_SBOS724.png
Figure 28. Positive Overload Recovery (Zoomed In)
OPA1688 OPA1689 C012_SBOS724.png
Figure 30. Negative Overload Recovery (Zoomed In)
OPA1688 OPA1689 C018_SBOS724.png
CL = 10 pF
Figure 32. Small-Signal Step Response (10 mV, G = 1)
OPA1688 OPA1689 C017_SBOS724.png
CL = 10 pF
Figure 34. Small-Signal Step Response (100 mV, G = 1)
OPA1688 OPA1689 C016_SBOS724.png
CL = 10 pF
Figure 36. Large-Signal Step Response (10 V, G = 1)
OPA1688 OPA1689 C025_SBOS724.png
G = 1, CL = 10 pF, 0.1% settling = ±10 mV
Figure 38. Large-Signal Settling Time (10-V Negative Step)
OPA1688 OPA1689 C014_OT_SBOS724.png
Figure 40. Short-Circuit Current vs Temperature
OPA1688 OPA1689 C020_SBOS724.png
PRF = –10 dBm, VSUPPLY = ±18 V, VCM = 0 V
Figure 42. EMIRR vs Frequency