SBOS008A September   2000  – September 2023 OPA177

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Revision History
  6. 5Pin Configuration and Functions
  7. 6Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Offset Voltage Adjustment
      2. 7.1.2 Input Protection
      3. 7.1.3 Noise Performance
      4. 7.1.4 Input Bias Current Cancellation
    2. 7.2 Typical Application
  9. 8Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 PSpice® for TI
        2. 8.1.1.2 TINA-TI™ Simulation Software (Free Download)
        3. 8.1.1.3 DIP-Adapter-EVM
        4. 8.1.1.4 DIYAMP-EVM
        5. 8.1.1.5 TI Reference Designs
        6. 8.1.1.6 Filter Design Tool
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • P|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

GUID-20211112-SS0I-QWVN-ZTXK-DCGHVMLDMGD0-low.png Figure 5-1 D Package, 8-Pin SOIC
and P Package, 8-Pin PDIP
(Top View)
Table 5-1 Pin Functions
PIN TYPE DESCRIPTION
NAME NO.
+In 3 Input Noninverting input
−In 2 Input Inverting input
No Internal Connection 5 — No internal connection (can be left floating)
Offset Trim 1, 8 — Input offset voltage trim (leave floating if not used)
V+ 7 Power Positive (highest) power supply
V− 4 Power Negative (lowest) power supply
VO 6 Output Output