SBOS110B May   1998  – June 2015 OPA2227 , OPA2228 , OPA227 , OPA228 , OPA4227 , OPA4228

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: OPA227U/UA and OPA228U/UA
    5. 6.5 Thermal Information: OPA227P/PA and OPA228P/PA
    6. 6.6 Electrical Characteristics: OPAx227 Series (VS = ±5 V to ±15 V)
    7. 6.7 Electrical Characteristics: OPAx228 Series (VS = ±5 V to ±15 V)
    8. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Offset Voltage and Drift
      2. 7.3.2 Operating Voltage
      3. 7.3.3 Offset Voltage Adjustment
      4. 7.3.4 Input Protection
      5. 7.3.5 Input Bias Current Cancellation
      6. 7.3.6 Noise Performance
      7. 7.3.7 Basic Noise Calculations
      8. 7.3.8 EMI Rejection Ratio (EMIRR)
        1. 7.3.8.1 EMIRR IN+ Test Configuration
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Three-Pole, 20 kHz Low Pass, 0.5-dB Chebyshev Filter
      2. 8.1.2 Long-Wavelength Infrared Detector Amplifier
      3. 8.1.3 High Performance Synchronous Demodulator
      4. 8.1.4 Headphone Amplifier
      5. 8.1.5 Three-Band Active Tone Control (Bass, Midrange, and Treble)
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Using the OPAx228 in Low Gains
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 TINA-TI (Free Software Download)
        2. 11.1.1.2 TI Precision Designs
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Related Links
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

OPA227, OPA228: P or D Package
8-Pin PDIP or 8-Pin SOIC
Top View
OPA227 OPA2227 OPA4227 OPA228 OPA2228 OPA4228 po_01_opa227_opa_228sbos110.gif
OPA2227, OPA2228: P or D Package
8-Pin PDIP or 8-Pin SOIC
Top View
OPA227 OPA2227 OPA4227 OPA228 OPA2228 OPA4228 po_02_opa227_opa228_sbos110.gif
OPA4227, OPA4228: N or D Package
14-Pin PDIP or 14-Pin-SOIC
Top View
OPA227 OPA2227 OPA4227 OPA228 OPA2228 OPA4228 po_03_opa4227_opa4228_sbos110.gif

Pin Functions: OPA227 and OPA228

PIN I/O DESCRIPTION
NAME PDIP, SOIC
Offset Trim 1 I Input offset voltage trim (leave floating if not used)
-In 2 I Inverting input
+In 3 I Noninverting input
V- 4 Negative (lowest) power supply
NC 5 No internal connection (can be left floating)
Output 6 O Output
V+ 7 Positive (highest) power supply
Offset Trim 8 Input offset voltage trim (leave floating if not used)

Pin Functions: OPA2227 and OPA2228

PIN I/O DESCRIPTION
NAME PDIP, SOIC
Out A 1 O Output channel A
–In A 2 I Inverting input channel A
+In A 3 I Noninverting input channel A
V- 4 Negative (lowest) power supply
+In B 5 I Noninverting input channel B
–In B 6 I Inverting input channel B
Out B 7 O Output channel B
V+ 8 Positive (highest) power supply

Pin Functions: OPA4227 and OPA4228

PIN I/O DESCRIPTION
NAME PDIP, SOIC
Out A 1 O Output channel A
-In A 2 I Inverting input channel A
+In A 3 I Noninverting input channel A
V+ 4 Positive (highest) power supply
+In B 5 I Noninverting input channel B
-In B 6 I Inverting input channel B
Out B 7 O Output channel B
Out C 8 O Output channel C
-In C 9 I Inverting input channel C
+In C 10 I Noninverting input channel C
V- 11 Negative (lowest) power supply
+In D 12 I Noninverting input channel D
-In D 13 I Inverting input channel D
Out D 14 O Output channel D