SBOS682B May   2013  – June 2016 OPA2317 , OPA317 , OPA4317

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: OPA317
    5. 6.5 Thermal Information: OPA2317
    6. 6.6 Thermal Information: OPA4317
    7. 6.7 Electrical Characteristics: VS = 1.8 V to 5.5 V
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Operating Voltage
      2. 8.3.2 Input Voltage
      3. 8.3.3 Input Differential Voltage
      4. 8.3.4 Internal Offset Correction
      5. 8.3.5 EMI Susceptibility and Input Filtering
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Achieving Output Swing to the Op Amp Negative Rail
    2. 9.2 Typical Applications
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 System Example
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Related Links
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

Over operating free-air temperature range, unless otherwise noted.(1)
MIN MAX UNIT
VS = (V+) – (V–) Supply voltage 7 V
Signal input terminals (2) (V–) – 0.3 (V+) + 0.3 V
Signal input terminals(2) –10 10 mA
Output short circuit(3) Continuous
TA Operating temperature –40 150 °C
TJ Junction temperature 150 °C
Tstg Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.3 V beyond the supply rails must be current-limited to 10 mA or less.
(3) Short-circuit to ground, one amplifier per package.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±4000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000
Machine model (MM) ±400
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted).
MIN MAX UNIT
(V+ – V–) Supply voltage 1.8 (±0.9) 5.5 (±2.25) V
TA Specified temperature –40 125 °C

6.4 Thermal Information: OPA317

THERMAL METRIC(1) OPA317 UNIT
D (SOIC) DBV (SOT-23) DCK (SC70)
8 PINS 5 PINS 5 PINS
RθJA Junction-to-ambient thermal resistance 140.1 220.8 298.4 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 89.8 97.5 65.4 °C/W
RθJB Junction-to-board thermal resistance 80.6 61.7 97.1 °C/W
ψJT Junction-to-top characterization parameter 28.7 7.6 0.8 °C/W
ψJB Junction-to-board characterization parameter 80.1 61.1 95.5 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance — — — °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Thermal Information: OPA2317

THERMAL METRIC(1) OPA2317 UNIT
D (SOIC) DGK (VSSOP)
8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 124 180.3 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 73.7 48.1 °C/W
RθJB Junction-to-board thermal resistance 64.4 100.9 °C/W
ψJT Junction-to-top characterization parameter 18 2.4 °C/W
ψJB Junction-to-board characterization parameter 63.9 99.3 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance — — °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.6 Thermal Information: OPA4317

THERMAL METRIC(1) OPA4317 UNIT
D (SOIC) PW (TSSOP)
14 PINS 14 PINS
RθJA Junction-to-ambient thermal resistance 83.8 120.8 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 70.7 34.3 °C/W
RθJB Junction-to-board thermal resistance 59.5 62.8 °C/W
ψJT Junction-to-top characterization parameter 11.6 1 °C/W
ψJB Junction-to-board characterization parameter 37.7 56.5 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance — — °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.7 Electrical Characteristics: VS = 1.8 V to 5.5 V

At TA = 25°C, RL = 10 kΩ connected to midsupply, VCM = VOUT = midsupply, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS Input offset voltage VS = 5 V 20 ±90 μV
TA = –40°C to +125°C, VS = 5 V ±100
dVOS/dT Input offset voltage
vs temperature		 TA = –40°C to +125°C 0.05 μV/°C
PSRR Input offset voltage
vs power supply		 TA = –40°C to +125°C, VS = 1.8 V to 5.5 V 1 10 μV/V
Long-term stability(1) See (1)
Channel separation, DC 5 μV/V
INPUT BIAS CURRENT
IB Input bias current ±275 pA
OPA4317 ±155
TA = –40°C to +125°C ±300
IOS Input offset current ±400 pA
OPA4317 ±140
NOISE
en Input voltage noise density f = 1 kHz 55 nV/√Hz
Input voltage noise f = 0.01 Hz to 1 Hz 0.3 μVPP
f = 0.1 Hz to 10 Hz 1.1
in Input current noise f = 10 Hz 100 fA/√Hz
INPUT VOLTAGE RANGE
VCM Common-mode voltage (V–) – 0.1 (V+) + 0.1 V
CMRR Common-mode rejection ratio TA = –40°C to +125°C
(V–) – 0.1 V < VCM < (V+) + 0.1 V		 95 108 dB
OPA4317
TA = –40°C to +125°C
(V–) – 0.1 V < VCM < (V+) + 0.1 V, VS = 5.5 V		 95 108
INPUT CAPACITANCE
Differential 2 pF
Common-mode 4 pF
OPEN-LOOP GAIN
AOL Open-loop voltage gain TA = –40°C to +125°C, RL = 10 kΩ
(V–) + 100 mV < VO < (V+) – 100 mV		 100 110 dB
FREQUENCY RESPONSE
GBW Gain-bandwidth product CL = 100 pF 300 kHz
SR Slew rate G = 1 0.15 V/μs
OUTPUT
Voltage output swing from rail TA = –40°C to +125°C 30 100 mV
ISC Short-circuit current ±5 mA
CL Capacitive load drive See the Typical Characteristics section
Open-loop output impedance f = 350 kHz, IO = 0 2 kΩ
POWER SUPPLY
VS Specified voltage 1.8 5.5 V
IQ Quiescent current per amplifier TA = –40°C to +125°C, IO = 0 21 35 μA
Turnon time VS = 5 V 100 µs
(1) 300-hour life test at 150°C demonstrated randomly distributed variation of approximately 1 μV.

6.8 Typical Characteristics

At TA = 25°C, CL = 0 pF, RL = 10 kΩ connected to midsupply, VCM = VOUT = midsupply, unless otherwise noted.
OPA317 OPA2317 OPA4317 tc_histo_bos432.gif Figure 1. Offset Voltage Production Distribution
OPA317 OPA2317 OPA4317 tc_cmrr-frq_bos351.gif
Figure 3. Common-Mode Rejection Ratio vs Frequency
OPA317 OPA2317 OPA4317 tc_vos-io_bos351.gif
Figure 5. Output Voltage Swing vs Output Current
OPA317 OPA2317 OPA4317 tc_ib-tmp_sbos682.gif
Figure 7. Input Bias Current vs Temperature
OPA317 OPA2317 OPA4317 tc_resp_lg_sbos682.gif
G = 1 RL = 10 kΩ
Figure 9. Large-Signal Step Response
OPA317 OPA2317 OPA4317 tc_pos_recov_bos682.gif
See Figure 18
Figure 11. Positive Overvoltage Recovery
OPA317 OPA2317 OPA4317 tc_tim-cloop_sbos682.gif
4-V Step
Figure 13. Settling Time vs Closed-Loop Gain
OPA317 OPA2317 OPA4317 tc_noise_sbos682.gif
Figure 15. 0.1-Hz to 10-Hz Noise
OPA317 OPA2317 OPA4317 tc_ibc_diff_v_sbos682.gif
See the Input Differential Voltage section
Figure 17. Input Bias Current vs
Input Differential Voltage
OPA317 OPA2317 OPA4317 tc_oloop-frq_sbos682.gif
Figure 2. Open-Loop Gain vs Frequency
OPA317 OPA2317 OPA4317 tc_psrr-frq_bos351.gif
Figure 4. Power-Supply Rejection Ratio vs Frequency
OPA317 OPA2317 OPA4317 tc_ib-vcm_bos342.gif
Figure 6. Input Bias Current vs Common-Mode Voltage
OPA317 OPA2317 OPA4317 tc_iq-tmp_bos342.gif
Figure 8. Quiescent Current vs Temperature
OPA317 OPA2317 OPA4317 tc_resp_sm_sbos682.gif
G = 1 RL = 10 kΩ
Figure 10. Small-Signal Step Response
OPA317 OPA2317 OPA4317 tc_neg_recov_bos682.gif
See Figure 18
Figure 12. Negative Overvoltage Recovery
OPA317 OPA2317 OPA4317 tc_ovrshoot-cl_bos351.gif
Figure 14. Small-Signal Overshoot vs Load Capacitance
OPA317 OPA2317 OPA4317 tc_noise-frq_bos351.gif Figure 16. Current and Voltage Noise Spectral Density vs Frequency