SBOS365G may   2006  – may 2023 OPA2365 , OPA365

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information: OPA365
    5. 7.5 Thermal Information: OPA2365
    6. 7.6 Electrical Characteristics
    7. 7.7 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Rail-to-Rail Input
      2. 8.3.2 Input and ESD Protection
      3. 8.3.3 Capacitive Loads
      4. 8.3.4 Achieving an Output Level of Zero Volts (0 V)
      5. 8.3.5 Active Filtering
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Basic Amplifier Configurations
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 System Examples
      1. 9.3.1 Driving an Analog-to-Digital Converter
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Development Support
        1. 10.1.1.1 PSpice® for TI
        2. 10.1.1.2 TINA-TI™ Simulation Software (Free Download)
        3. 10.1.1.3 DIP-Adapter-EVM
        4. 10.1.1.4 DIYAMP-EVM
        5. 10.1.1.5 TI Reference Designs
        6. 10.1.1.6 Filter Design Tool
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

GUID-9993B755-F378-40E1-9555-FA0848F3F3F8-low.gifFigure 6-1 OPA365: DBV Package, 5-Pin SOT-23 (Top View)
GUID-C2253600-9C3C-4A42-9C97-22D759E0FBE1-low.gif
(1) NC denotes no internal connection.
Figure 6-2 OPA365: D Package, 8-Pin SOIC (Top View)
Pin Functions: OPA365
PIN TYPE DESCRIPTION
NAME SOIC SOT
–IN 2 4 Input Negative (inverting) input
+IN 3 3 Input Positive (noninverting) input
NC 1, 5, 8 — — No internal connection (can be left floating)
V– 4 2 — Negative (lowest) power supply
V+ 7 5 — Positive (highest) power supply
VOUT 6 1 Output Output
GUID-B9C6E03B-CB50-4F88-958E-6836DEA9E9EB-low.gif Figure 6-3 OPA2365: D Package, 8-Pin SOIC (Top View)
Pin Functions: OPA2365
PIN TYPE DESCRIPTION
NAME NO.
–IN A 2 Input Negative (inverting) input signal, channel A
+IN A 3 Input Positive (noninverting) input signal, channel A
–IN B 6 Input Negative (inverting) input signal, channel B
+IN B 5 Input Positive (noninverting) input signal, channel B
V– 4 — Negative (lowest) power supply
V+ 8 — Positive (highest) power supply
VOUTA 1 Output Output, channel A
VOUTB 7 Output Output, channel B