SBOSAI0 December   2023 OPA310-Q1

ADVANCE INFORMATION  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information for Single Channel
    5. 5.5 Thermal Information for Dual Channel
    6. 5.6 Thermal Information for Quad Channel
    7. 5.7 Electrical Characteristics
    8. 5.8 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Operating Voltage
      2. 6.3.2 Rail-to-Rail Input
      3. 6.3.3 Rail-to-Rail Output
      4. 6.3.4 Capacitive Load and Stability
      5. 6.3.5 Overload Recovery
      6. 6.3.6 EMI Rejection
      7. 6.3.7 ESD and Electrical Overstress
      8. 6.3.8 Input ESD Protection
      9. 6.3.9 Shutdown Function
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 OPAx310-Q1 Low-Side, Current Sensing Application
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4.     Trademarks
    5. 8.4 Electrostatic Discharge Caution
    6. 8.5 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Tape and Reel Information
    2. 10.2 Mechanical Data

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DBV|5
  • DBV|6
  • DCK|5
  • DCK|6
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Typical Characteristics

at TA = 25°C, V+ = 2.75V, V– = –2.75V, RL = 10kΩ connected to VS / 2, VCM = VS / 2, and VOUT = VS / 2 (unless otherwise noted)

GUID-20220617-SS0I-PQFK-HF8Z-5WNXCCDH379Q-low.gif
VS = 5.5 V VCM = VS / 2 TA = 25°C
No. of devices = 70 Mean = –36µV Sigma = 215µV
Figure 5-1 Offset Voltage Distribution Histogram
GUID-20220617-SS0I-TVPH-ZJVH-Q6HT55LQKWZ5-low.gif
VS = 5.5V VCM = VS / 2 TA = 25°C
No. of devices = 140 Mean = 0.6 pA Sigma = 1.2 pA
Figure 5-3 Input Bias Current Distribution Histogram
GUID-20220617-SS0I-Q6FR-GTLQ-DJ3QCFRQB6ML-low.gif
VS = 5.5V VCM = VS / 2 TA = 25°C
No. of devices = 140 Mean = 0.2 pA Sigma = 1.5 pA
Figure 5-5 Input Offset Current Distribution Histogram
GUID-20220617-SS0I-V5N8-RJJC-CPB8XJB82ZTP-low.gif
VS = 5.5V, VCM = V– No. of devices = 72
Figure 5-7 Input Offset Voltage vs Temperature
GUID-20220617-SS0I-QZH0-HKHV-D1Z0JWJ0WJRX-low.gif
V+ = 2.75V, V– = –2.75 V
No. of devices = 72
Figure 5-9 Offset Voltage vs Common-Mode
GUID-20220617-SS0I-FV4X-HQNL-T69GPM6BZXX4-low.gif
V+ = 2.75V, V– = –2.75V, VCM > (V+) – 0.6V
No. of devices = 72
Figure 5-11 Offset Voltage vs Common-Mode
GUID-20220617-SS0I-7SMG-DM11-DV37F6RQSCSH-low.gif
VS = 5.5V, VCM = VS/2
Figure 5-13 IB vs Temperature
GUID-20220617-SS0I-FLJV-S5K8-SGL7KCTP5M8C-low.gif
V+ = 2.75V, V– = –2.75V, VCM = VS/2
Figure 5-15 IB vs Common-Mode Voltage
GUID-20220617-SS0I-1QRT-WF3W-R8ZVRRJTVP9M-low.gif
RL = 10kΩ
Figure 5-17 Open-Loop Gain vs Temperature
GUID-20220621-SS0I-TXWK-9PHZ-VTQVNMP82BQB-low.gifFigure 5-19 Open-Loop Output Impedance vs Frequency
GUID-20220718-SS0I-ZHQH-13WV-XCRXVSKL8BBB-low.gif
V+ = 2.75V, V– = –2.75 V
Figure 5-21 Output Voltage Swing vs Output Current (Sourcing)
GUID-20220617-SS0I-J5P0-HHXK-CGMKRM2FRGK4-low.gif
V+ = 0.9V, V– = –0.9 V
Figure 5-23 Output Voltage Swing vs Output Current (Sourcing)
GUID-20220621-SS0I-4J03-L8ZR-3SBBZZ14TSL1-low.gifFigure 5-25 PSRR vs Frequency
GUID-20220621-SS0I-SWM3-1P31-CXWLJ1N5NBCJ-low.gifFigure 5-27 CMRR vs Frequency
GUID-20220621-SS0I-NXBX-X8XH-FCTZDXHJNFHP-low.gifFigure 5-29 0.1-Hz to 10-Hz Voltage Noise in Time Domain
GUID-20220621-SS0I-KSGH-QPRB-MGZZM09THQSN-low.gif
VS = 5.5V VCM = 2.5V G = 1
BW = 80kHz VOUT = 0.5 VRMS
Figure 5-31 THD + N vs Frequency
GUID-20220627-SS0I-4RSQ-0FDV-SMNB12HLFPCX-low.gif
VS = 5.5V VCM = 2.5V f = 1kHz
G = 1 BW = 80 kHz
Figure 5-33 THD + N vs Amplitude
GUID-20220617-SS0I-LBKR-G1GV-LGP9QRZ9PDRP-low.gif
VCM = VS/2
Figure 5-35 Quiescent Current vs Supply Voltage
GUID-20220617-SS0I-LQB3-SNKQ-DNFCZ2HT9RLW-low.gif
VCM = VS/2
Figure 5-37 Quiescent Current vs Temperature
GUID-20220621-SS0I-LSP0-VNTD-6KRF7XDC84CH-low.gif
G = 1 VIN = 100mVpp
Figure 5-39 Small Signal Overshoot vs Capacitive Load
GUID-20220621-SS0I-HZFM-WCQC-BXWRSXSLWJ8P-low.gif
G = 1 VIN = 6 VPP
Figure 5-41 No Phase Reversal
GUID-20220621-SS0I-8B5G-PCCT-TS8R3SZCZD4Z-low.gif
G = –10 VIN = 600 mVPP
Figure 5-43 Overload Recovery
GUID-20220621-SS0I-RLZV-2MWZ-J6H9FXLFKL8H-low.gif
G = –1 VIN = 10 mVPP CL = 10pF
Figure 5-45 Small-Signal Step Response
GUID-20220627-SS0I-ZWS4-1SSB-TN64NN8CPJBW-low.gif
G = 1 VIN = 4 VPP CL = 10pF
Figure 5-47 Large-Signal Settling Time (Negative)
GUID-20220621-SS0I-JKG2-JG5K-SHKXK5MZXFC0-low.gif
G = –1 VIN = 4 VPP CL = 10pF
Figure 5-49 Large-Signal Step Response
GUID-20220617-SS0I-Z5TB-ZCGH-NWTQQXVS7GRB-low.gif
VS = 5.5 V
Figure 5-51 Short-Circuit Current vs Temperature
GUID-20220621-SS0I-RPDJ-NQJL-MPLJFJTGPXPN-low.gifFigure 5-53 Channel Separation
GUID-20220617-SS0I-6VZM-MFMN-WTZRCGRC2ZWC-low.gif
VS = 5.5V VCM = VS / 2 TA = –40°C to +125°C
No. of devices = 70
Mean = 0.5µV/°C Sigma = 0.3µV/°C
Figure 5-2 Offset Voltage Drift Distribution Histogram
GUID-20220617-SS0I-N7B2-VTR2-JW7QHZD1HHMN-low.gif
VS = 5.5V VCM = VS / 2 TA = 85°C
No. of devices = 140 Mean = 4.6 pA Sigma = 1.3 pA
Figure 5-4 Input Bias Current Distribution Histogram
GUID-20220617-SS0I-B66V-K958-R4X1TKFSXN3B-low.gif
VS = 5.5V VCM = VS / 2 TA = 85°C
No. of devices = 70 Mean = 0.3 pA Sigma = 1.6 pA
Figure 5-6 Input Offset Current Distribution Histogram
GUID-20220617-SS0I-H75P-BC9C-RQHGJK4F48WN-low.gif
VS = 5.5V, VCM = V+ No. of devices = 72
Figure 5-8 Input Offset Voltage vs Temperature
GUID-20220617-SS0I-WLXZ-QFGM-ZPSNMXQZ6DL9-low.gif
 V+ = 2.75V, V– = –2.75V, (V–) < VCM < (V+) – 0.6V
No. of devices = 72
Figure 5-10 Offset Voltage vs Common-Mode
GUID-20220617-SS0I-GK5P-K1TG-0XR1GKH7KLPR-low.gif
VCM = (V–) No. of devices = 72
Figure 5-12 Offset Voltage vs Supply Voltage
GUID-20220617-SS0I-SH1S-QF7Q-GSWMDD6VD1S0-low.gif
VS = 5.5V, VCM = VS/2
Figure 5-14 IOS vs Temperature
GUID-20220617-SS0I-5K9L-X3ZZ-3CKJL67C6NTK-low.gif
V+ = 2.75V, V– = –2.75V, VCM = VS/2
Figure 5-16 IOS vs Common-Mode Voltage
GUID-20220621-SS0I-9KVM-RHR0-H29RGVFHR2BR-low.gif
CL = 10pF
Figure 5-18 Open-Loop Gain and Phase vs Frequency
GUID-20220621-SS0I-PZFD-PMBF-HLQBZMPK5GMD-low.gif
CL = 10pF
Figure 5-20 Closed-Loop Gain vs Frequency
GUID-20220617-SS0I-MGL1-FKSX-H7DFFCFQLJ6R-low.gif
V+ = 2.75V, V– = –2.75 V
Figure 5-22 Output Voltage Swing vs Output Current (Sinking)
GUID-20220617-SS0I-R1J6-LD5J-J2FZHHDCMR6W-low.gif
V+ = 0.9V, V– = –0.9 V
Figure 5-24 Output Voltage Swing vs Output Current (Sinking)
GUID-20220617-SS0I-7MFF-QQWV-W6CZWDTDM6FW-low.gif
VS = 1.5V to 5.5 V
Figure 5-26 DC PSRR vs Temperature
GUID-20220617-SS0I-MQQ4-FTQ0-RKGGR8V90Z7L-low.gif
VS = 5.5V, (V–) < VCM < (V+) – 0.6V
Figure 5-28 DC CMRR vs Temperature
GUID-20220621-SS0I-0H6J-NRTZ-G7SRWJ9NPC11-low.gifFigure 5-30 Input Voltage Noise Spectral Density
GUID-20220718-SS0I-86TT-8FMR-TNGQJVXWWZGS-low.gif
VS = 5.5V VCM = 2.5V G = –1
BW = 80kHz VOUT = 0.5 VRMS
Figure 5-32 THD + N vs Frequency
GUID-20220627-SS0I-ZV02-B2SQ-HSR3WMQ2RSHW-low.gif
VS = 5.5V VCM = 2.5V f = 1kHz
G = –1 BW = 80 kHz
Figure 5-34 THD + N vs Amplitude
GUID-20220617-SS0I-ZVBG-QQVB-7DNKFXGX7NPS-low.gif
V+ = 2.75V, V– = –2.75V
Figure 5-36 Quiescent Current vs Common-Mode Voltage
GUID-20220726-SS0I-13K1-VBW1-DVSSV8C477PQ-low.gif
G = –1 VIN = 100mVpp
Figure 5-38 Small Signal Overshoot vs Capacitive Load
GUID-20220621-SS0I-F2DN-WMK7-ZFNCL0ZS8D8C-low.gifFigure 5-40 Phase Margin vs Capacitive Load
GUID-20220621-SS0I-SMG9-T6PK-T4KT4FQNPF24-low.gif
G = –10 VIN = 600 mVPP
Figure 5-42 Overload Recovery
GUID-20220621-SS0I-VPN6-6WF1-2XRM1RPS5B56-low.gif
G = 1 VIN = 10 mVPP CL = 10pF
Figure 5-44 Small-Signal Step Response
GUID-20220621-SS0I-FBX7-QDXD-CRPZGJHB7ZCM-low.gif
G = 1 VIN = 4 VPP CL = 10pF
Figure 5-46 Large-Signal Step Response
GUID-20220627-SS0I-HGXZ-CTSJ-DLBX9QQ7J3NN-low.gif
G = 1 VIN = 4 VPP CL = 10pF
Figure 5-48 Large-Signal Settling Time (Positive)
GUID-20220621-SS0I-2LPD-QM6F-8BTDWRQ9XSNQ-low.gifFigure 5-50 Maximum Output Voltage vs Frequency
GUID-20220621-SS0I-MKBQ-5129-G1MDWW6PGC6X-low.gifFigure 5-52 Electromagnetic Interference Rejection Ratio Referred to Noninverting Input (EMIRR+) vs Frequency