SBOS830I September   2017  – October 2021 OPA189 , OPA2189 , OPA4189

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information: OPA189
    5. 7.5 Thermal Information: OPA2189
    6. 7.6 Thermal Information: OPA4189
    7. 7.7 Electrical Characteristics
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Operating Characteristics
      2. 8.3.2 Phase-Reversal Protection
      3. 8.3.3 Input Bias Current Clock Feedthrough
      4. 8.3.4 EMI Rejection
      5. 8.3.5 EMIRR +IN Test Configuration
      6. 8.3.6 Electrical Overstress
      7. 8.3.7 MUX-Friendly Inputs
      8. 8.3.8 Noise Performance
      9. 8.3.9 Basic Noise Calculations
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 25-kHz Low-Pass Filter
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Discrete INA + Attenuation for ADC With 3.3-V Supply
      3. 9.2.3 Bridge Amplifier
      4. 9.2.4 Low-Side Current Monitor
      5. 9.2.5 Programmable Power Supply
      6. 9.2.6 RTD Amplifier With Linearization
    3. 9.3 System Examples
      1. 9.3.1 24-Bit, Delta-Sigma, Differential Load Cell or Strain Gauge Sensor Signal Conditioning
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
        1. 12.1.1.1 TINA-TI™ Simulation Software (Free Download)
        2. 12.1.1.2 TI Precision Designs
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

GUID-B4918EE0-1026-4770-A2DB-82E83EE0724D-low.gifFigure 6-1 OPA189 D (8-Pin SOIC) and DGK (8-Pin VSSOP) Packages, Top View
GUID-DC5DD996-5B90-4E5F-9948-299544AD2B75-low.gifFigure 6-2 OPA189 DBV (5-Pin SOT-23) Package, Top View
Table 6-1 Pin Functions: OPA189
PIN I/O DESCRIPTION
NAME D (SOIC)
DGK (VSSOP)		 DBV (SOT-23)
–IN 2 4 I Inverting input
+IN 3 3 I Noninverting input
NC 1, 5, 8 — — No internal connection (can be left floating)
OUT 6 1 O Output
V– 4 2 — Negative (lowest) power supply
V+ 7 5 — Positive (highest) power supply
GUID-1105425F-FF67-451D-AC89-4A929538AC10-low.gifFigure 6-3 OPA2189 D (8-Pin SOIC) and DGK (8-Pin VSSOP) Packages, Top View
Table 6-2 Pin Functions: OPA2189
PIN I/O DESCRIPTION
NAME NO.
–IN A 2 I Inverting input channel A
+IN A 3 I Noninverting input channel A
–IN B 6 I Inverting input channel B
+IN B 5 I Noninverting input channel B
OUT A 1 O Output channel A
OUT B 7 O Output channel B
V– 4 — Negative supply
V+ 8 — Positive supply
GUID-AA8CE1C6-5CBD-48FD-BDB1-64118A3D2E4C-low.gifFigure 6-4 OPA4189 D (14-Pin SOIC) and PW (14-Pin TSSOP) Packages, Top View
Table 6-3 Pin Functions: OPA4189
PIN I/O DESCRIPTION
NAME NO.
–IN A 2 I Inverting input channel A
+IN A 3 I Noninverting input channel A
–IN B 6 I Inverting input channel B
+IN B 5 I Noninverting input channel B
–IN C 9 I Inverting input channel C
+IN C 10 I Noninverting input channel C
–IN D 13 I Inverting input channel D
+IN D 12 I Noninverting input channel D
OUT A 1 O Output channel A
OUT B 7 O Output channel B
OUT C 8 O Output channel C
OUT D 14 O Output channel D
V– 11 — Negative supply
V+ 4 — Positive supply