SCPS113N
October 2004 – October 2021
PCA9306
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics AC Performance (Translating Down) (EN = 3.3 V)
6.7
Switching Characteristics AC Performance (Translating Down) (EN = 2.5 V)
6.8
Switching Characteristics AC Performance (Translating Up) (EN = 3.3 V)
6.9
Switching Characteristics AC Performance (Translating Up) (EN = 2.5 V)
6.10
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.1.1
Definition of threshold voltage
8.1.2
Correct Device Set Up
8.1.3
Disconnecting an I2C target from the Main I2C Bus Using the EN Pin
8.1.4
Supporting Remote Board Insertion to Backplane with PCA9306
8.1.5
Switch Configuration
8.1.6
Controller on Side 1 or Side 2 of Device
8.1.7
LDO and PCA9306 Concerns
8.1.8
Current Limiting Resistance on VREF2
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Enable (EN) Pin
8.3.2
Voltage Translation
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.1.1
General Applications of I2C
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Bidirectional Voltage Translation
9.2.2.2
Sizing Pullup Resistors
9.2.2.3
PCA9306 Bandwidth
9.2.3
Application Curve
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Receiving Notification of Documentation Updates
12.2
Support Resources
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
Glossary
Package Options
Mechanical Data (Package|Pins)
DQE|8
MPSS008B
DCU|8
MPDS050D
DCT|8
MPDS049D
YZT|8
MXBG045G
Thermal pad, mechanical data (Package|Pins)
DCU|8
PPTD129A
Orderable Information
scps113n_oa
scps113n_pm
1
Features
2-Bit bidirectional translator for SDA and SCL lines in mixed-mode I
2
C Applications
I
2
C and SMBus compatible
Less than 1.5-ns maximum propagation delay to accommodate standard-mode and fast-mode I
2
C devices and multiple controllers
Allows voltage-level translation between
1.2-V V
REF1
and 1.8-V, 2.5-V, 3.3-V,
or 5-V V
REF2
1.8-V V
REF1
and 2.5-V, 3.3-V, or 5-V V
REF2
2.5-V V
REF1
and 3.3-V or 5-V V
REF2
3.3-V V
REF1
and 5-V V
REF2
Provides bidirectional voltage translation with no direction pin
Low 3.5-Ω ON-state resistance between input and output ports provides less signal distortion
Open-drain I
2
C I/O ports (SCL1, SDA1, SCL2, and SDA2)
5-V Tolerant I
2
C I/O ports to support mixed-mode signal operation
High-impedance SCL1, SDA1, SCL2, and SDA2 pins for EN = low
Lockup-free operation for isolation when EN = low
Flow-through pinout for ease of printed-circuit-board trace routing
Latch-up performance exceeds 100 mA Per JESD 78, class II
ESD protection exceeds JESD 22
2000-V Human-body model (A114-A)
1000-V Charged-device model (C101)