SBOS207C October   2001  – December 2015 PGA2310

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Inputs and Outputs
      2. 7.3.2 Serial Control Port
      3. 7.3.3 Gain Settings
      4. 7.3.4 Daisy-Chaining Multiple PGA2310 Devices
      5. 7.3.5 Zero Crossing Detection
      6. 7.3.6 Mute Function
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power-Up State
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The PGA2310 is commonly used as a digitally controlled analog volume control. Analog volume is controlled through a serial interface in 0.5-dB steps, ranging from a gain of 31.5 dB down to an attenuation of −95.5 dB.

8.2 Typical Application

Figure 13 depicts the recommended connections for the PGA2310.

PGA2310 recomm_conn_diag.gif Figure 13. Recommended Connection Diagram

8.2.1 Design Requirements

  • Wide dynamic range: 35.5 dB to –95.5 dB
  • Operate from 5-V digital supply and ±15-V analog supplies
  • Digitally controlled analog volume

8.2.2 Detailed Design Procedure

The PGA2310 is a complete digitally controlled analog stereo volume controller system on a chip requiring only a controller to select the gain or attenuation through a serial interface. Figure 13 illustrates the basic connections to the PGA2310. Power-supply bypass capacitors should be placed as close to the PGA2310 package as physically possible.

8.2.3 Application Curve

PGA2310 D050_SBOS207.gif Figure 14. PGA2310 Operating at 0 dB, –6 dB and –12 dB