SLDS231 August 2018 PGA305
PRODUCTION DATA.
To receive Diagnostics Information through the I2C Interface while the PGA305 compensation algorithm runs, the I2C command 0x06 is used. The Implemented Diagnostics in PGA305 are stuck fault, which means that if a diagnostic fault occurred in the past, this will be reported when the next diagnostics read occurs even in the case where the fault is not present in the system any longer. When the I2C command has been received, the I2C will report the Power Supply diagnostics and the Analog Front End Diagnostics and will clear the stuck diagnostic flags.
The I2C example in Table 14 shows the diagnostics read process from the PGA device. In this example the PGA305 slave address is assumed to be 0x20 (I2CADDR = 1).
I2C Data Flow Description | I2C Master | PGA305 |
---|---|---|
1. Master Sends Command 0x06 (Read PGA305 Diagnostics) |
0x40 (Slave Address + DI Page + R/W bit) 0x09(Register Address) 0x06 (Data) |
Acknowledge Acknowledge Acknowledge |
2. Master Reads Byte1 (Power Supply Diagnostics) |
0x40 (Slave Address + DI Page + R/W bit) 0x05(Register Address) 0x41 (Slave Address + DI Page + R/W bit) |
Acknowledge Acknowledge 0xbb (Where 'bb' is the data Value) |
2. Master Reads Byte0 (Analog Front-End Diagnostics) |
0x40 (Slave Address + DI Page + R/W bit) 0x04(Register Address) 0x41 (Slave Address + DI Page + R/W bit) |
Acknowledge Acknowledge 0xbb (Where 'bb' is the data Value) |
Further, Table 15 lists the bits that order for the Power Supply Diagnostics (Byte1) and the Analog Front End Diagnostics (Byte2).
Power Supply (Byte 1) | Analog Front End (Byte 0) |
---|---|
Bit 7: Digital Regulator DVDD Under Voltage (DVDD_UV) Bit 6: Digital Regulator DVDD Over Voltage (DVDD_OV) Bit 5: Analog Regulator AVDD Unde rVoltage (AVDD_UV) Bit 4: Analog Regulator AVDD Over Voltage (AVDD_OV) Bit 3: Reference Under Voltage (REF_UV) Bit 2: Reference Over Voltage (REF_OV) Bit 1: Bridge Supply Over Voltage (VBRG_OV) Bit 0: Bridge Supply Under Voltage (VBRG_UV) |
Bit 7:Temperature Channel AFE Output Under Voltage (TGAIN_UV) Bit 6: Temperature Channel AFE Output Over Voltage (TGAIN_OV) Bit 5: Pressure Channel AFE Output Under Voltage (PGAIN_UV) Bit 4: Pressure Channel AFE Output Over Voltage (PGAIN_OV) Bit 3: Unused (N/A) Bit 2: INT+ and INT- pins Over Voltage (INT_OV) Bit 1: INP+ and INP- pins Under Voltage (INP_UV) Bit 0: INP+ and INP- pins Over Voltage (INP_OV) |