SNVS903B December   2012  – May 2016 SM74611

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 From t0 to t1
      2. 7.3.2 At t1
      3. 7.3.3 From t1 to t2
      4. 7.3.4 At t2
    4. 7.4 Device Functional Modes
      1. 7.4.1 FET Q1 OFF
      2. 7.4.2 FET Q1 ON
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Community Resources
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Layout

10.1 Layout Guidelines

Some layout guidelines must be followed to ensure proper conduction from ANODE to CATHODE pins. ANODE and CATHODE traces carrying the load current must be wide to reduce the amount of parasitic trace inductance as shown in Figure 10.

10.2 Layout Example

SM74611 layout_sm74611_snvs903.png Figure 10. Layout Example for SM74611