SLLS505P February   2002  – February 2022 SN65HVD10 , SN65HVD11 , SN65HVD12 , SN75HVD12

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Driver Electrical Characteristics
    6. 7.6  Receiver Electrical Characteristics
    7. 7.7  Power Dissipation Characteristics
    8. 7.8  Driver Switching Characteristics
    9. 7.9  Receiver Switching Characteristics
    10. 7.10 Dissipation Ratings
    11. 7.11 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
      1. 9.4.1 Low-Power Standby Mode
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
        1. 10.2.1.1 Data Rate and Bus Length
        2. 10.2.1.2 Stub Length
        3. 10.2.1.3 Bus Loading
        4. 10.2.1.4 Receiver Fail-safe
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
    3. 12.3 Thermal Considerations
      1. 12.3.1 Thermal Characteristics of IC Packages
  13. 13Device and Documentation Support
    1. 13.1 Device Support
    2. 13.2 Related Links
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Support Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Parameter Measurement Information

GUID-53AD50E7-1FE7-44F2-B4EB-8A260029ADBA-low.gif Figure 8-1 Driver VOD Test Circuit and Voltage and Current Definitions
GUID-A73E3ED1-83EB-4C2A-8196-3EC298E7CB5D-low.gif Figure 8-2 Driver VOD With Common-Mode Loading Test Circuit
GUID-9AA22CAA-D7B6-4260-BA55-54A61E0AF7F9-low.gif
Input: PRR = 500 kHz, 50% Duty Cycle, tr < 60 ns, tf < 6 ns ZO = 50 Ω
Figure 8-3 Test Circuit and Definitions for the Driver Common-Mode Output Voltage
GUID-42D50075-2C16-41DE-944E-E5F63BBF53FA-low.gif
Generator: PRR = 500 kHz, 50% Duty Cycle, tr < 60 ns, tf < 6 ns ZO = 50 Ω
Figure 8-4 Driver Switching Test Circuit and Voltage Waveforms
GUID-7A91C788-A3A3-4F4B-80D3-FE1C55B16C66-low.gif
Generator: PRR = 500 kHz, 50% Duty Cycle, tr < 60 ns, tf < 6 ns ZO = 50 Ω
Figure 8-5 Driver High-Level Enable and Disable Time Test Circuit and Voltage Waveforms
GUID-BB60A67A-4C88-4BB7-AA1A-41933D04B090-low.gif
Generator: PRR = 500 kHz, 50% Duty Cycle, tr < 60 ns, tf < 6 ns ZO = 50 Ω
Figure 8-6 Driver Low-Level Output Enable and Disable Time Test Circuit and Voltage Waveforms
GUID-F2B2CC67-8EFB-4EC2-90EE-F69020AA07A4-low.gif
The time tPZL(x) is the measure from DE to VOD(x). VOD is valid when it is greater than 1.5 V.
Figure 8-7 Driver Enable Time from DE to VOD
GUID-BDC59522-5C0F-4B2F-884B-1125723B5755-low.gif Figure 8-8 Receiver Voltage and Current Definitions
GUID-6BDD57DB-6BC1-4517-97B5-13C05AF2D197-low.gif Figure 8-9 Receiver Switching Test Circuit and Voltage Waveforms
GUID-F5F1155A-D51E-40D0-B406-941FC760589B-low.gif Figure 8-10 Receiver Enable and Disable Time Test Circuit and Voltage Waveforms With Drivers Enabled
GUID-3557DFCD-E407-4B45-875F-EC81E8815547-low.gif Figure 8-11 Receiver Enable Time From Standby (Driver Disabled)
GUID-617C55C5-E952-45D6-B93B-E7005609D045-low.gif
NOTE: This test is conducted to test survivability only. Data stability at the R output is not specified.
Figure 8-12 Test Circuit, Transient Over Voltage Test
GUID-D19CEB7D-B0E4-4129-B12A-90397769CE45-low.gif Figure 8-13 Equivalent Input and Output Schematic Diagrams