SCLS511A June 2003 – February 2024 SN74AHC4066
PRODUCTION DATA
- 1
- 1 Features
- 2 Applications
- 3 Description
- 4 Pin Configuration and Functions
- 5 Specifications
- 6 Parameter Measurement Information
- 7 Detailed Description
- 8 Device and Documentation Support
- 9 Revision History
- 10Mechanical, Packaging, and Orderable Information
Package Options
Refer to the PDF data sheet for device specific package drawings
Mechanical Data (Package|Pins)
- D|14
- RGY|14
- DB|14
- DGV|14
- PW|14
- N|14
- NS|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information
3 Description
This quadruple silicon-gate CMOS analog switch is designed for 1V to 5.5V VCC operation.
The switch is designed to handle both analog and digital signals. Each switch permits signals with amplitudes of up to 5.5V (peak) to be transmitted in either direction.
Each switch section has its own enable input control (C). A high-level voltage applied to C turns on the associated switch section.
Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.
Package Information
| PART NUMBER | PACKAGE(1) | PACKAGE SIZE(2) |
|---|---|---|
| SN74AHC4066 | D (SOIC, 14) | 8.65mm × 6mm |
| PW (TSSOP, 14) | 5mm × 6.4mm | |
| RGY (VQFN, 14) | 3.5mm × 3.5mm |
(1) For more information, see Section 10.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
Logic Diagram, Each Switch (Positive Logic)