SCLS243P October   1995  – April 2024 SN54AHCT573 , SN74AHCT573

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings #GUID-7B45293C-3589-425B-8D5E-1C6A9CD70F43/SCLS243908
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  Timing Requirements
    7. 5.7  Switching Characteristics, SNx4AHCT573
    8. 5.8  Switching Characteristics, SN54AHCT573
    9. 5.9  Operating Characteristics
    10. 5.10 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DGV|20
  • DB|20
  • N|20
  • DW|20
  • PW|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Parameter Measurement Information

Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1MHz, ZO = 50Ω, RL = 1kΩ, tt < 3ns, Vt = 1.5V.

For clock inputs, fmax is measured when the input duty cycle is 50%.

The outputs are measured one at a time with one input transition per measurement.

GUID-EB3CF292-AF1E-41A1-A556-76EDB85F7F6F-low.gif
(1) CL includes probe and test-fixture capacitance.
Figure 6-1 Load Circuit for 3-State Outputs
GUID-20231208-SS0I-GLLS-VWHB-RC92HVSZDLPC-low.svgFigure 6-2 Voltage Waveforms, Pulse Duration
GUID-20231208-SS0I-9KMJ-7GCC-1QTL4JVKRSVB-low.svg
(1) The greater between tPLH and tPHL is the same as tpd.
Figure 6-4 Voltage Waveforms, Propagation Delays
GUID-20200713-CA0I-ZTM5-PTJB-WD0LZ8VNG7PG-low.gif
(1) The greater between tr and tf is the same as tt.
Figure 6-6 Voltage Waveforms, Input and Output Transition Times
GUID-20231208-SS0I-PP29-5DML-MH62SP6PR5Z4-low.svgFigure 6-3 Voltage Waveforms, Setup and Hold Times
GUID-20231208-SS0I-DPWG-FJZT-HXPZHLQWXZ20-low.svg
(1) tPLZ and tPHZ are the same as tdis.
(2) tPZL and tPZH are the same as ten.
Figure 6-5 Voltage Waveforms, Propagation Delays for 3-State Outputs