SCDS039J December   1997  – January 2018 SN74CBTLV3253

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Logic Diagram (Positive Logic)
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • PW|16
  • DBQ|16
  • RGY|16
  • D|16
  • DGV|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The SN74CBTLV3253 device is a dual 1-of-4 high-speed FET multiplexer and demultiplexer. The low ON-state resistance of the switch allows connections to be made with minimal propagation delay.

The select (S0, S1) inputs control the data flow. The FET multiplexers/demultiplexers are disabled when the associated output-enable (OE) input is high.

The SN74CBTLV3253 device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.

Device Information(1)

PART NUMBERPACKAGEBODY SIZE (NOM)
SN74CBTLV3253D SOIC (16) 9.90 mm × 3.90 mm
SN74CBTLV3253DBQ SSOP (16) 4.90 mm × 3.90 mm
SN74CBTLV3253DGV TVSOP (16) 3.60 mm × 4.40 mm
SN74CBTLV3253RGY VQFN (16) 4.00 mm × 3.50 mm
SN74CBTLV3253PW TSSOP (16) 5.00 mm × 4.40 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.