SN74CBTLV3253

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Product details

Protocols Analog Configuration 4:1 Number of channels 2 Bandwidth (MHz) 200 Ron (typ) (mΩ) 5000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 3.6 Operating temperature range (°C) -40 to 85 ESD CDM (kV) 1 Input/output continuous current (max) (mA) 128 COFF (typ) (pF) 5.5 OFF-state leakage current (max) (µA) 1 Ron (max) (mΩ) 40000 VIH (min) (V) 2 VIL (max) (V) 0.8 Rating Catalog
Protocols Analog Configuration 4:1 Number of channels 2 Bandwidth (MHz) 200 Ron (typ) (mΩ) 5000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 3.6 Operating temperature range (°C) -40 to 85 ESD CDM (kV) 1 Input/output continuous current (max) (mA) 128 COFF (typ) (pF) 5.5 OFF-state leakage current (max) (µA) 1 Ron (max) (mΩ) 40000 VIH (min) (V) 2 VIL (max) (V) 0.8 Rating Catalog
TSSOP (PW) 16 32 mm² (5 mm × 6.4 mm) VQFN (RGY) 16 14 mm² (4 mm × 3.5 mm) SOIC (D) 16 59.4 mm² (9.9 mm × 6 mm) TVSOP (DGV) 16 23.04 mm² (3.6 mm × 6.4 mm) SSOP (DBQ) 16 29.4 mm² (4.9 mm × 6 mm)
  • Functionally Equivalent to QS3253
  • 5Ω Switch Connection Between Two Ports
  • Rail-to-Rail Switching on Data I/O Ports
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100mA Per JESD 78, Class II
  • Functionally Equivalent to QS3253
  • 5Ω Switch Connection Between Two Ports
  • Rail-to-Rail Switching on Data I/O Ports
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100mA Per JESD 78, Class II

The SN74CBTLV3253 device is a dual 1-of-4 high-speed FET multiplexer and demultiplexer. The low ON-state resistance of the switch allows connections to be made with minimal propagation delay.

The select (S0, S1) inputs control the data flow. The FET multiplexers/demultiplexers are disabled when the associated output-enable ( OE) input is high.

The SN74CBTLV3253 device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current cannot backflow through the device when it is powered down. The device has isolation during power off.

The SN74CBTLV3253 device is a dual 1-of-4 high-speed FET multiplexer and demultiplexer. The low ON-state resistance of the switch allows connections to be made with minimal propagation delay.

The select (S0, S1) inputs control the data flow. The FET multiplexers/demultiplexers are disabled when the associated output-enable ( OE) input is high.

The SN74CBTLV3253 device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current cannot backflow through the device when it is powered down. The device has isolation during power off.

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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet SN74CBTLV3253 Low-Voltage Dual 1-of-4 FET Multiplexer/Demultiplexer datasheet (Rev. K) PDF | HTML Jul 15, 2026
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML Jun 2, 2022
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML Dec 1, 2021
Application brief Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C) PDF | HTML Jan 6, 2021

Design & development

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LEADLESS-ADAPTER1 — Surface mount to DIP header adapter for testing of TI's 6,8,10,12,14,16, & 20-pin leadless packages

The EVM-LEADLESS1 board allows for quick testing and bread boarding of TI's common leadless packages.  The board has footprints to convert TI's DRC, DTP, DQE, RBW, RGY, RSE, RSV, RSW RTE, RTJ, RUK , RUC, RUG, RUM,RUT and YZP surface mount packages to 100mil DIP headers.
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Simulation model

SN74CBTLV3253 IBIS Model

SCDM057.ZIP (25 KB) - IBIS model
Supported products & hardware
Package Pins CAD symbols, footprints & 3D models
TSSOP (PW) 16 Ultra Librarian
VQFN (RGY) 16 Ultra Librarian
SOIC (D) 16 Ultra Librarian
TVSOP (DGV) 16 Ultra Librarian
SSOP (DBQ) 16 Ultra Librarian

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