SCLS393Q APRIL   1998  – August 2015 SN74LV123A

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (continued)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Timing Requirements, VCC = 2.5 V ± 0.2 V
    7. 7.7  Timing Requirements, VCC = 3.3 V ± 0.3 V
    8. 7.8  Timing Requirements, VCC = 5 V ± 0.5 V
    9. 7.9  Switching Characteristics, VCC = 2.5 V ± 0.2 V
    10. 7.10 Switching Characteristics, VCC = 3.3 V ± 0.3 V
    11. 7.11 Switching Characteristics, VCC = 5 V ± 0.5 V
    12. 7.12 Operating Characteristics
    13. 7.13 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagrams
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
        1. 10.2.1.1 Power-Down Considerations
        2. 10.2.1.2 Output Pulse Duration
        3. 10.2.1.3 Retriggering Data
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Related Links
    3. 13.3 Community Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature (unless otherwise noted)(1)
MIN MAX UNIT
VCC Supply voltage –0.5 7 V
VI Input voltage(2) –0.5 7 V
VO Voltage applied to any output in the high-impedance or power-off state(2) –0.5 7 V
VO Output voltage in the high or low state(2)(3) –0.5 VCC + 0.5 V
VO Output voltage in power-off state(2) –0.5 7 V
IIK Input clamp current VI < 0 –20 mA
IOK Output clamp current VO < 0 –50 mA
IO Continuous output current VO = 0 to VCC ±25 mA
Continuous current through VCC or GND ±50 mA
Tj Junction temperature 150 °C
Tstg Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The value is limited to 5.5 V maximum.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

See (1).
SN54LV123A(2) SN74LV123A UNIT
MIN NOM MAX MIN NOM MAX
VCC Supply voltage 2 5.5 2 5.5 V
VIH High-level input voltage VCC = 2 V 1.5 1.5 V
VCC = 2.3 V to 2.7 V VCC × 0.7 VCC × 0.7
VCC = 3 V to 3.6 V VCC × 0.7 VCC × 0.7
VCC = 4.5 V to 5.5 V VCC × 0.7 VCC × 0.7
VIL Low-level input voltage VCC = 2 V 0.5 0.5 V
VCC = 2.3 V to 2.7 V VCC × 0.3 VCC × 0.3
VCC = 3 V to 3.6 V VCC × 0.3 VCC × 0.3
VCC = 4.5 V to 5.5 V VCC × 0.3 VCC × 0.3
VI Input voltage 0 5.5 0 5.5 V
VO Output voltage 0 VCC 0 VCC V
IOH High-level output current VCC = 2 V –50 –50 µA
VCC = 2.3 V to 2.7 V –2 –2 mA
VCC = 3 V to 3.6 V –6 –6
VCC = 4.5 V to 5.5 V –12 –12
IOL Low-level output current VCC = 2 V 50 50 µA
VCC = 2.3 V to 2.7 V 2 2 mA
VCC = 3 V to 3.6 V 6 6
VCC = 4.5 V to 5.5 V 12 12
Rext External timing resistance VCC = 2 V 5 5
VCC ≥ 3 V 1 1
Cext External timing capacitance No restriction No restriction pF
Δt/ΔVCC Power-up ramp rate 1 1 ms/V
TA Operating free-air temperature –55 125 –40 125 °C
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, SCBA004.
(2) Product Preview

7.4 Thermal Information

THERMAL METRIC(1) SNx4LV123A UNIT
D (SOIC) DB (SSOP) DGV (TVSOP) NS (SO) PW (TSSOP) RGY (VQFN)
16 PINS 16 PINS 16 PINS 16 PINS 16 PINS 16 PINS
RθJA Junction-to-ambient thermal resistance 73 82 120 64 108 39 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

7.5 Electrical Characteristics

over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS VCC –55°C to 125°C
SN54LV123A(2)
–40°C to 85°C
SN74LV123A
Recommended
–40°C to 125°C
SN74LV123A
UNIT
MIN TYP MAX MIN TYP MAX MIN TYP MAX
VOH IOH = –50 µA 2 V to
5.5 V
VCC – 0.1 VCC – 0.1 VCC – 0.1 V
IOH = –2 mA 2.3 V 2 2 2
IOH = –6 mA 3 V 2.48 2.48 2.48
IOH = –12 mA 4.5 V 3.8 3.8 3.8
VOL IOL = 50 µA 2 V to
5.5 V
0.1 0.1 0.1 V
IOL = 2 mA 2.3 V 0.4 0.4 0.4
IOL = 6 mA 3 V 0.44 0.44 0.44
IOL = 12 mA 4.5 V 0.55 0.55 0.55
II Rext/Cext(1) VI = 5.5 V or GND 5.5 V ±2.5 ±2.5 ±25 µA
A, B, and CLR VI = 5.5 V or GND 0 V ±1 ±1 ±1
0 to
5.5 V
±1 ±1 ±1
ICC Quiescent VI = VCC or GND, IO = 0 5.5 V 20 20 20 µA
ICC Active state
(per circuit)
VI = VCC or GND,
Rext/Cext = 0.5 VCC
3 V 280 280 280 µA
4.5 V 650 650 650
5.5 V 975 975 975
Ioff VI or VO = 0 to 5.5 V 0 V 5 5 µA
Ci VI = VCC or GND 3.3 V 1.9 1.9 1.9 pF
5 V 1.9 1.9 1.9
(1) This test is performed with the terminal in the off-state condition.
(2) Product Preview

7.6 Timing Requirements, VCC = 2.5 V ± 0.2 V

over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 5)
PARAMETER TEST CONDITIONS TA = 25°C –55°C to 125°C
SN54LV123A(2)
–40°C to 85°C
SN74LV123A
–40°C to 125°C
SN74LV123A
UNIT
MIN  TYP MAX MIN  TYP MAX MIN  TYP MAX MIN TYP MAX
tw Pulse duration CLR 6.5 6.5 6.5 ns
A or B trigger 6.5 6.5 6.5
trr Pulse retrigger time Rext = 1 kΩ Cext = 100 pF See(1)  94 See(1)  See(1) See(1) ns
Cext = 0.01 µF See(1)  2 See(1)  See(1) See(1) µs
(1) See retriggering data in the Application Information section.
(2) Product Preview

7.7 Timing Requirements, VCC = 3.3 V ± 0.3 V

over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 5)
PARAMETER TEST CONDITIONS TA = 25°C –55°C to 125°C
SN54LV123A(2)
–40°C to 85°C
SN74LV123A
–40°C to 125°C
SN74LV123A
UNIT
MIN  TYP MAX MIN  TYP MAX MIN  TYP MAX MIN TYP MAX
tw Pulse duration CLR 5 ns
A or B trigger 5
trr Pulse retrigger time Rext = 1 kΩ Cext = 100 pF See(1) 76 See(1) See(1)  See(1) ns
Cext = 0.01 µF See(1) 1.8 See(1) See(1) See(1) µs
(1) See retriggering data in the Application Information section.
(2) Product Preview

7.8 Timing Requirements, VCC = 5 V ± 0.5 V

over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 5)
PARAMETER TEST CONDITIONS TA = 25°C –55°C to 125°C
SN54LV123A(2)
–40°C to 85°C
SN74LV123A
–40°C to 125°C
SN74LV123A
UNIT
MIN  TYP MAX MIN  TYP MAX MIN  TYP MAX MIN TYP MAX
tw Pulse duration CLR 5 ns
A or B trigger 5
trr Pulse retrigger time Rext = 1 kΩ Cext = 100 pF See(1) 59 See(1)  See(1)  See(1)  ns
Cext = 0.01 µF See(1) 1.5 See(1)  See(1)  See(1)  µs
(1) See retriggering data in the Application Information section.
(2) Product Preview

7.9 Switching Characteristics, VCC = 2.5 V ± 0.2 V

over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 5)
PARAMETER FROM
(INPUT)
TO
(OUTPUT)
TEST
CONDITIONS
TA = 25°C –55°C to 125°C
SN54LV123A(4)
–40°C to 85°C
SN74LV123A
–40°C to 125°C
SN74LV123A
UNIT
MIN TYP MAX MIN TYP MAX MIN  TYP MAX MIN  TYP MAX
tpd A or B Q or Q CL = 15 pF 14.5 31.4(1) 1(1) 37(1) 1 37 1 37 ns
CLR Q or Q 13 25(1) 1(1) 29.5(1) 1 29.5 1 29.5
CLR trigger Q or Q 15.1 33.4(1) 1(1) 39(1) 1 39 1 39
tpd A or B Q or Q CL = 50 pF 16.6 36 1 42 1 42 1 42 ns
CLR Q or Q 14.7 32.8 1 34.5 1 34.5 1 34.5
CLR trigger Q or Q 17.4 38 1 44 1 44 1 44
tw(2) Q or Q CL = 50 pF
Cext = 28 pF
Rext = 2 kΩ
197 260 320 320 320 ns
CL = 50 pF
Cext = 0.01 µF
Rext = 10 kΩ
90 100 110 90 110 90 110 90 110 µs
CL = 50 pF
Cext = 0.1 µF
Rext = 10 kΩ
0.9 1 1.1 0.9 1.1 0.9 1.1 0.9 1.1 ms
Δtw(3) CL = 50 pF ±1%
(1) On products compliant to MIL-PRF-38535, this parameter is not production tested.
(2) tw = Duration of pulse at Q and Q outputs
(3) Δtw = Output pulse-duration variation (Q and Q) between circuits in same package
(4) Product Preview

7.10 Switching Characteristics, VCC = 3.3 V ± 0.3 V

over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 5)
PARAMETER FROM
(INPUT)
TO
(OUTPUT)
TEST
CONDITIONS
TA = 25°C –55°C to 125°C
SN54LV123A(4)
–40°C to 85°C
SN74LV123A
–40°C to 125°C
SN74LV123A
UNIT
MIN TYP MAX MIN TYP MAX MIN  TYP MAX MIN  TYP MAX
tpd A or B Q or Q CL = 15 pF 10.2 20.6(1) 1(1) 24(1) 1 24 1 24 ns
CLR Q or Q 9.3 15.8(1) 1(1) 18.5(1) 1 18.5 1 18.5
CLR trigger Q or Q 10.6 22.4(1) 1(1) 26(1) 1 26 1 26
tpd A or B Q or Q CL = 50 pF 11.8 24.1 1 27.5 1 27.5 1 27.5 ns
CLR Q or Q 10.5 19.3 1 22 1 22 1 22
CLR trigger Q or Q 12.3 25.9 1 29.5 1 29.5 1 29.5
tw(2) Q or Q CL = 50 pF
Cext = 28 pF
Rext = 2 kΩ
182 240 300 300 300 ns
CL = 50 pF
Cext = 0.01 µF
Rext = 10 kΩ
90 100 110 90 110 90 110 90 110 µs
CL = 50 pF
Cext = 0.1 µF
Rext = 10 kΩ
0.9 1 1.1 0.9 1.1 0.9 1.1 0.9 1.1 ms
Δtw(3) CL = 50 pF ±1%
(1) On products compliant to MIL-PRF-38535, this parameter is not production tested.
(2) tw = Duration of pulse at Q and Q outputs
(3) Δtw = Output pulse-duration variation (Q and Q) between circuits in same package
(4) Product Preview

7.11 Switching Characteristics, VCC = 5 V ± 0.5 V

over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 5)
PARAMETER FROM
(INPUT)
TO
(OUTPUT)
TEST
CONDITIONS
TA = 25°C –55°C to 125°C
SN54LV123A(4)
–40°C to 85°C
SN74LV123A
–40°C to 125°C
SN74LV123A
UNIT
MIN TYP MAX MIN TYP MAX MIN  TYP MAX MIN  TYP MAX
tpd A or B Q or Q CL = 15 pF 7.1 12(1) 1(1) 14(1) 1 14 1 14 ns
CLR Q or Q 6.5 9.4(1) 1(1) 11(1) 1 11 1 11
CLR trigger Q or Q 7.4 12.9(1) 1(1) 15(1) 1 15 1 15
tpd A or B Q or Q CL = 50 pF 8.3 14 1 16 1 16 1 16 ns
CLR Q or Q 7.4 11.4 1 13 1 13 1 13
CLR trigger Q or Q 8.7 14.9 1 17 1 17 1 17
tw(2) Q or Q CL = 50 pF
Cext = 28 pF
Rext = 2 kΩ
167 200 240 240 240 ns
CL = 50 pF
Cext = 0.01 µF
Rext = 10 kΩ
90 100 110 90 110 90 110 90 110 µs
CL = 50 pF
Cext = 0.1 µF
Rext = 10 kΩ
0.9 1 1.1 0.9 1.1 0.9 1.1 0.9 1.1 ms
Δtw(3) CL = 50 pF ±1%
(1) On products compliant to MIL-PRF-38535, this parameter is not production tested.
(2) tw = Duration of pulse at Q and Q outputs
(3) Δtw = Output pulse-duration variation (Q and Q) between circuits in same package
(4) Product Preview

7.12 Operating Characteristics

TA = 25°C
PARAMETER TEST CONDITIONS VCC TYP UNIT
Cpd Power dissipation capacitance CL = 50 pF, f = 10 MHz 3.3 V 44 pF
5 V 49

7.13 Typical Characteristics

Operation of the devices at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied.
SN54LV123A SN74LV123A app3_cls393.gifFigure 1. Minimum Trigger vs VCC Characteristics
SN54LV123A SN74LV123A appn1_cls393.gif
Figure 3. External Capacitance vs Multiplier Factor
SN54LV123A SN74LV123A app4_cls939.gifFigure 2. Output Pulse-Duration Constant vs Supply Voltage
SN54LV123A SN74LV123A appn2_cls393.gif
Figure 4. Distribution of Units vs Output Pulse Duration