SCLS395N April   1998  – March 2023 SN74LV138A

PRODMIX  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions (1)
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Switching Characteristics, VCC = 2.5 V ± 0.25 V
    7. 6.7  Switching Characteristics, VCC = 3.3 V ± 0.3 V
    8. 6.8  Switching Characteristics, VCC = 5 V ± 0.5 V
    9. 6.9  Operating Characteristics
    10. 6.10 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Standard CMOS Inputs
      2. 8.3.2 Balanced CMOS Push-Pull Outputs
      3. 8.3.3 Partial Power Down (Ioff)
      4. 8.3.4 Clamp Diode Structure
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Power Considerations
      2. 9.2.2 Input Considerations
      3. 9.2.3 Output Considerations
      4. 9.2.4 Detailed Design Procedure
      5. 9.2.5 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • BQB|16
  • DB|16
  • PW|16
  • NS|16
  • RGY|16
  • D|16
  • DGV|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Recommended Operating Conditions(1)

SN74LV138AUNIT
MINMAX
VCCSupply voltage25.5V
VIHHigh-level input voltageVCC = 2 V1.5V
VCC = 2.3 V to 2.7 VVCC  × 0.7
VCC = 3 V to 3.6 VVCC  × 0.7
VCC = 4.5 V to 5.5 VVCC  × 0.7
VILLow-level input voltageVCC = 2 V0.5V
VCC = 2.3 V to 2.7 VVCC  × 0.3
VCC = 3 V to 3.6 VVCC  × 0.3
VCC = 4.5 V to 5.5 VVCC  × 0.3
VIInput voltage05.5V
VOOutput voltage0VCCV
IOHHigh-level output currentVCC = 2 V–50μA
VCC = 2.3 V to 2.7 V–2mA
VCC = 3 V to 3.6 V–6
VCC = 4.5 V to 5.5 V–12
IOLLow-level output currentVCC = 2 V50μA
VCC = 2.3 V to 2.7 V2mA
VCC = 3 V to 3.6 V6
VCC = 4.5 V to 5.5 V12
Δt/ΔvInput transition rise or fall rateVCC = 2.3 V to 2.7 V200ns/V
VCC = 3 V to 3.6 V100
VCC = 4.5 V to 5.5 V20
TA Operating free-air temperature –40 85 °C
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs.