SCLS385K September   1997  – December 2014 SN74LV32A

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Simplified Schematic
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Switching Characteristics, VCC = 2.5 V ± 0.2 V
    7. 7.7  Switching Characteristics, VCC = 3.3 V ± 0.3 V
    8. 7.8  Switching Characteristics, VCC = 5 V ± 0.5 V
    9. 7.9  Noise Characteristics
    10. 7.10 Operating Characteristics
    11. 7.11 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Related Links
    2. 13.2 Trademarks
    3. 13.3 Electrostatic Discharge Caution
    4. 13.4 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|14
  • RGY|14
  • DB|14
  • DGV|14
  • PW|14
  • NS|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9 Detailed Description

9.1 Overview

This quadruple 2-input positive-OR gate is designed for 2-V to 5.5-V VCC operation.

The SN74LV32A device performs the Boolean function bf_cas286.gif in positive logic.

This part has low drive which produces slower rise and fall times that will reduce ringing on the output signal. The inputs and outputs are of high impedance when VCC = 0 V.

9.2 Functional Block Diagram

logic_cls385.gifFigure 4. Logic Diagram, Each Gate (Positive Logic)

9.3 Feature Description

  • Wide operating voltage range
    • Operates from 2 V to 5.5 V
  • Allows down-voltage translation
    • Inputs accept voltages to 5.5 V
  • Ioff feature
    • Supports Live Insertion, Partial Power DownMode, and Back Drive Protection

9.4 Device Functional Modes

Table 1. Function Table
(Each Gate)

INPUTS OUTPUT
Y
A B
H X H
X H H
L L L