SCLS985 January   2024 SN74LV4T125-EP

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Additional Product Selection
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Noise Characteristics
    8. 6.8 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Balanced CMOS 3-State Outputs
      2. 8.3.2 Clamp Diode Structure
      3. 8.3.3 LVxT Enhanced Input Voltage
        1. 8.3.3.1 Down Translation
        2. 8.3.3.2 Up Translation
    4. 8.4 Device Functional Modes
  10. Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Additional Product Selection

DEVICE PACKAGE DESCRIPTION
SN74LV1T00 DCK, DBV 2‐Input Positive‐NAND Gate
SN74LV1T02 DCK, DBV 2‐Input Positive‐NOR Gate
SN74LV1T04 DCK, DBV Inverter Gate
SN74LV1T08 DCK, DBV 2‐Input Positive‐AND Gate
SN74LV1T34 DCK, DBV, DRL Single Buffer Gate
SN74LV1T14 DCK, DBV Single Schmitt‐Trigger Inverter Gate
SN74LV1T32 DCK, DBV 2‐Input Positive‐OR Gate
SN74LV1T86 DCK, DBV Single 2‐Input Exclusive‐Or Gate
SN74LV1T125 DCK, DBV, DRL Single Buffer Gate with 3‐state Output
SN74LV1T126 DCK, DBV, DRL Single Buffer Gate with 3‐state Output
SN74LV4T125-EP RGY, PW Quadruple Bus Buffer Gate With 3‐State Outputs