SCES224R April   1999  – January 2015 SN74LVC1G126

PRODUCTION DATA.  

  1. Applications
  2. Simplified Schematic
  3. Revision History
  4. Pin Configuration and Functions
  5. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Thermal Information
    4. 5.4 Switching Characteristics, -40°C to 125°C
    5. 5.5 Operating Characteristics
    6. 5.6 Typical Characteristics
  6. Parameter Measurement Information
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DBV|5
  • DSF|6
  • DCK|5
  • DRL|5
  • DRY|6
  • YZP|5
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Detailed Description

7.1 Overview

The SN74LVC1G126 device contains a dual buffer gate with output enable control and performs the Boolean function Y = A.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pull-down resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

7.2 Functional Block Diagram

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7.3 Feature Description

  • 1.65 V to 5.5 V operating voltage range
  • Allows down voltage translation
    • 5 V to 3.3 V
    • 5 V or 3.3 V to 1.8 V
  • Inputs accept voltages to 5.5 V
    • 5.5-V tolerance on input pin when VCC = 0 V
  • Ioff feature
    • Allows voltage on the inputs and outputs when VCC is 0 V
    • Able to reduce leakage when VCC is 0 V

7.4 Device Functional Modes

Table 1. Function Table

INPUTS OUTPUT
Y
OE A
H H H
H L L
L X Z