SCES538H January   2004  – August 2026 SN74LVC1G38

PRODUCTION DATA  

  1.   1
  2.   2
  3. 1 Features
  4. 2 Applications
  5. 3 Description
  6. 4 Pin Configuration and Functions
  7. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  Switching Characteristics, CL = 15pF
    7. 5.7  Switching Characteristics, CL = 30pF or 50pF, –40°C to +85°C
    8. 5.8  Switching Characteristics, CL = 30pF or 50pF, –40°C to +125°C
    9. 5.9  Operating Characteristics
    10. 5.10 Typical Characteristics
  8. 6 Parameter Measurement Information
  9.   19
  10. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 High-Drive Open-Drain Output
      2. 7.3.2 Standard CMOS Inputs
      3. 7.3.3 Clamp Diodes
      4. 7.3.4 Partial Power Down (Ioff)
      5. 7.3.5 Over-Voltage Tolerant Inputs
      6. 7.3.6 Up Translation and Down Translation Capable Outputs
    4. 7.4 Device Functional Modes
  11. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  12. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  13. 10Revision History
  14. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The SN74LVC1G38 device is a single 2-input NAND gate. This device performs the Boolean function Y = A • B or Y = Ā + B̅ in positive logic.

Package Information
PART NUMBER PACKAGE(1) PACKAGE SIZE(2) BODY SIZE(3)
SN74LVC1G38
DPW (X2SON, 5) 0.8mm × 0.8mm 0.8mm × 0.8mm
DRY (SON, 6) 1.45mm × 1mm 1.45mm × 1mm
DSF (SON, 6) 1mm × 1mm 1mm × 1mm
DCK (SOT-SC70, 5) 2mm × 2.1mm 2mm × 1.25mm
DBV (SOT-23, 5) 2.9mm × 2.8mm 2.9mm × 1.6mm
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
(3) The body size (length × width) is a nominal value and does not include pins.
SN74LVC1G38 Logic Diagram Logic Diagram