SCES938B October   2021  – May 2022 SN74LXC2T45

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Switching Characteristics: Tsk, TMAX
    7. 6.7  Switching Characteristics, VCCA = 1.2 ± 0.1 V
    8. 6.8  Switching Characteristics, VCCA = 1.5 ± 0.1 V
    9. 6.9  Switching Characteristics, VCCA = 1.8 ± 0.15 V
    10. 6.10 Switching Characteristics, VCCA = 2.5 ± 0.2 V
    11. 6.11 Switching Characteristics, VCCA = 3.3 ± 0.3 V
    12. 6.12 Switching Characteristics, VCCA = 5.0 ± 0.5 V
    13. 6.13 Operating Characteristics
    14. 6.14 Typical Characteristics
  7. Parameter Measurement Information
    1. 7.1 Load Circuit and Voltage Waveforms
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 CMOS Schmitt-Trigger Inputs with Integrated Pulldowns
        1. 8.3.1.1 I/O's with Integrated Dynamic Pull-Down Resistors
        2. 8.3.1.2 Control Inputs with Integrated Static Pull-Down Resistors
      2. 8.3.2 Balanced High-Drive CMOS Push-Pull Outputs
  9. Partial Power Down (Ioff)
  10. 10VCC Isolation and VCC Disconnect (Ioff-float)
  11. 11Over-Voltage Tolerant Inputs
  12. 12Glitch-Free Power Supply Sequencing
  13. 13Negative Clamping Diodes
  14. 14Fully Configurable Dual-Rail Design
  15. 15Supports High-Speed Translation
  16. 16Device Functional Modes
  17. 17Application and Implementation
    1. 17.1 Application Information
    2. 17.2 Enable Times
    3. 17.3 Typical Application
      1. 17.3.1 Design Requirements
      2. 17.3.2 Detailed Design Procedure
  18. 18Power Supply Recommendations
  19. 19Layout
    1. 19.1 Layout Guidelines
    2. 19.2 Layout Example
  20. 20Device and Documentation Support
    1. 20.1 Documentation Support
      1. 20.1.1 Related Documentation
    2. 20.2 Receiving Notification of Documentation Updates
    3. 20.3 Support Resources
    4. 20.4 Trademarks
    5. 20.5 Electrostatic Discharge Caution
    6. 20.6 Glossary
  21. 21Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Overview

The SN74LXC2T45 is a 2-bit translating transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCA and VCCB supplies as low as 1.1 V and as high as 5.5 V. Additionally, the device can be operated with VCCA = VCCB. The A port is designed to track VCCA, and the B port is designed to track VCCB.

The SN74LXC2T45 device is designed for asynchronous communication between two data buses, and transmits data from the A bus to the B bus or from the B bus to the A bus based on the logic level of the direction-control input (DIR). The control pin of the SN74LXC2T45 (DIR) are referenced to VCCA. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ.

This device is fully specified for partial-power-down applications using the Ioff current. The Ioff protection circuitry ensures that no excessive current is drawn from or sourced into an input, output, or I/O while the device is powered down.

The VCC isolation or VCC disconnect feature ensures that if either VCC is less than 100 mV or disconnected with the complementary supply within the recommended operating conditions, both I/O ports are weakly pulled-down and then set to the high-impedance state by disabling their outputs while the supply current is maintained. The Ioff-float circuitry ensures that no excessive current is drawn from or sourced into an input, output, or I/O while the supply is floating.

Glitch-free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.