SLASFC3A January   2024  – March 2025 TAC5111-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  Timing Requirements: I2C Interface
    7. 5.7  Switching Characteristics: I2C Interface
    8. 5.8  Timing Requirements: SPI
    9. 5.9  Switching Characteristics: SPI
    10. 5.10 Timing Requirements: TDM, I2S or LJ Interface
    11. 5.11 Switching Characteristics: TDM, I2S or LJ Interface
    12. 5.12 Timing Requirements: PDM Digital Microphone Interface
    13. 5.13 Switching Characteristics: PDM Digital Microphone Interface
    14. 5.14 Timing Diagrams
    15. 5.15 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Serial Interfaces
        1. 6.3.1.1 Control Serial Interfaces
        2. 6.3.1.2 Audio Serial Interfaces
          1. 6.3.1.2.1 Time Division Multiplexed Audio (TDM) Interface
          2. 6.3.1.2.2 Inter IC Sound (I2S) Interface
          3. 6.3.1.2.3 Left-Justified (LJ) Interface
        3. 6.3.1.3 Using Multiple Devices With Shared Buses
      2. 6.3.2  Phase-Locked Loop (PLL) and Clock Generation
      3. 6.3.3  Input Channel Configurations
      4. 6.3.4  Output Channel Configurations
      5. 6.3.5  Reference Voltage
      6. 6.3.6  Programmable Microphone Bias
      7. 6.3.7  Digital PDM Microphone Record Channel
      8. 6.3.8  Incremental ADC (IADC) Mode
      9. 6.3.9  Signal-Chain Processing
        1. 6.3.9.1 ADC Signal-Chain
          1. 6.3.9.1.1  5 to 4 Input Select Multiplexer (5:4 MUX)
          2. 6.3.9.1.2  Programmable Channel Gain and Digital Volume Control
          3. 6.3.9.1.3  Programmable Channel Gain Calibration
          4. 6.3.9.1.4  Programmable Channel Phase Calibration
          5. 6.3.9.1.5  Programmable Digital High-Pass Filter
          6. 6.3.9.1.6  Programmable Digital Biquad Filters
          7. 6.3.9.1.7  Programmable Channel Summer and Digital Mixer
          8. 6.3.9.1.8  Configurable Digital Decimation Filters
            1. 6.3.9.1.8.1 Linear-phase filters
              1. 6.3.9.1.8.1.1 Sampling Rate: 8kHz or 7.35kHz
              2. 6.3.9.1.8.1.2 Sampling Rate: 16kHz or 14.7kHz
              3. 6.3.9.1.8.1.3 Sampling Rate: 24kHz or 22.05kHz
              4. 6.3.9.1.8.1.4 Sampling Rate: 32kHz or 29.4kHz
              5. 6.3.9.1.8.1.5 Sampling Rate: 48kHz or 44.1kHz
              6. 6.3.9.1.8.1.6 Sampling Rate: 96kHz or 88.2kHz
              7. 6.3.9.1.8.1.7 Sampling Rate: 192kHz or 176.4kHz
            2. 6.3.9.1.8.2 Low-latency Filters
              1. 6.3.9.1.8.2.1 Sampling Rate: 24kHz or 22.05kHz
              2. 6.3.9.1.8.2.2 Sampling Rate: 32kHz or 29.4kHz
              3. 6.3.9.1.8.2.3 Sampling Rate: 48kHz or 44.1kHz
              4. 6.3.9.1.8.2.4 Sampling Rate: 96kHz or 88.2kHz
              5. 6.3.9.1.8.2.5 Sampling Rate: 192kHz or 176.4kHz
            3. 6.3.9.1.8.3 Ultra Low-latency Filters
              1. 6.3.9.1.8.3.1 Sampling Rate: 24kHz or 22.05kHz
              2. 6.3.9.1.8.3.2 Sampling Rate: 32kHz or 29.4kHz
              3. 6.3.9.1.8.3.3 Sampling Rate: 48kHz or 44.1kHz
              4. 6.3.9.1.8.3.4 Sampling Rate: 96kHz or 88.2kHz
              5. 6.3.9.1.8.3.5 Sampling Rate: 192kHz or 176.4kHz
          9. 6.3.9.1.9  Automatic Gain Controller (AGC)
          10. 6.3.9.1.10 Voice Activity Detection (VAD)
          11. 6.3.9.1.11 Ultrasonic Activity Detection (UAD)
        2. 6.3.9.2 DAC Signal-Chain
          1. 6.3.9.2.1 Programmable Channel Gain and Digital Volume Control
          2. 6.3.9.2.2 Programmable Channel Gain Calibration
          3. 6.3.9.2.3 Programmable Digital High-Pass Filter
          4. 6.3.9.2.4 Programmable Digital Biquad Filters
          5. 6.3.9.2.5 Programmable Digital Mixer
          6. 6.3.9.2.6 Configurable Digital Interpolation Filters
            1. 6.3.9.2.6.1 Linear-phase filters
              1. 6.3.9.2.6.1.1 Sampling Rate: 8kHz or 7.35kHz
              2. 6.3.9.2.6.1.2 Sampling Rate: 16kHz or 14.7kHz
              3. 6.3.9.2.6.1.3 Sampling Rate: 24kHz or 22.05kHz
              4. 6.3.9.2.6.1.4 Sampling Rate: 32kHz or 29.4kHz
              5. 6.3.9.2.6.1.5 Sampling Rate: 48kHz or 44.1kHz
              6. 6.3.9.2.6.1.6 Sampling Rate: 96kHz or 88.2kHz
              7. 6.3.9.2.6.1.7 Sampling Rate: 192kHz or 176.4kHz
              8. 6.3.9.2.6.1.8 Sampling Rate: 384kHz or 352.8kHz
              9. 6.3.9.2.6.1.9 Sampling Rate 768kHz or 705.6kHz
            2. 6.3.9.2.6.2 Low-latency Filters
              1. 6.3.9.2.6.2.1 Sampling Rate: 24kHz or 22.05kHz
              2. 6.3.9.2.6.2.2 Sampling Rate: 32kHz or 29.4kHz
              3. 6.3.9.2.6.2.3 Sampling Rate: 48kHz or 44.1kHz
              4. 6.3.9.2.6.2.4 Sampling Rate: 96kHz or 88.2kHz
              5. 6.3.9.2.6.2.5 Sampling Rate: 192kHz or 176.4kHz
            3. 6.3.9.2.6.3 Ultra-Low-Latency Filters
              1. 6.3.9.2.6.3.1 Sampling Rate: 24kHz or 22.05kHz
              2. 6.3.9.2.6.3.2 Sampling Rate: 32kHz or 29.4kHz
              3. 6.3.9.2.6.3.3 Sampling Rate: 48kHz or 44.1kHz
              4. 6.3.9.2.6.3.4 Sampling Rate: 96kHz or 88.2kHz
              5. 6.3.9.2.6.3.5 Sampling Rate 192kHz or 176.4kHz
      10. 6.3.10 Interrupts, Status, and Digital I/O Pin Multiplexing
      11. 6.3.11 Power Tune Mode
    4. 6.4 Device Functional Modes
      1. 6.4.1 Sleep Mode or Software Shutdown
      2. 6.4.2 Active Mode
      3. 6.4.3 Software Reset
    5. 6.5 Programming
      1. 6.5.1 Control Serial Interfaces
        1. 6.5.1.1 I2C Control Interface
          1. 6.5.1.1.1 General I2C Operation
          2. 6.5.1.1.2 I2C Single-Byte and Multiple-Byte Transfers
            1. 6.5.1.1.2.1 I2C Single-Byte Write
            2. 6.5.1.1.2.2 I2C Multiple-Byte Write
            3. 6.5.1.1.2.3 I2C Single-Byte Read
            4. 6.5.1.1.2.4 I2C Multiple-Byte Read
        2. 6.5.1.2 SPI Control Interface
  8. 7 Register Maps
    1. 7.1 Device Configuration Registers
      1. 7.1.1 Book0_Page0 Registers
      2. 7.1.2 B0_P1 Registers
      3. 7.1.3 Book0_Page3 Registers
    2. 7.2 Programmable Coefficient Registers
      1. 7.2.1  Programmable Coefficient Registers: Page 8
      2. 7.2.2  Programmable Coefficient Registers: Page 9
      3. 7.2.3  Programmable Coefficient Registers: Page 10
      4. 7.2.4  Programmable Coefficient Registers: Page 11
      5. 7.2.5  Programmable Coefficient Registers: Page 15
      6. 7.2.6  Programmable Coefficient Registers: Page 16
      7. 7.2.7  Programmable Coefficient Registers: Page 17
      8. 7.2.8  Programmable Coefficient Registers: Page 18
      9. 7.2.9  Programmable Coefficient Registers: Page 19
      10. 7.2.10 Programmable Coefficient Registers: Page 25
      11. 7.2.11 Programmable Coefficient Registers: Page 26
      12. 7.2.12 Programmable Coefficient Registers: Page 27
      13. 7.2.13 Programmable Coefficient Registers: Page 28
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Application
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
      4. 8.2.4 Application Performance Plots
      5. 8.2.5 Example Device Register Configuration Script for EVM Setup
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 AVDD_MODE for 1.8V Operation
      2. 8.3.2 IOVDD_IO_MODE for 1.8V and 1.2V Operation
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.2.7 Programmable Coefficient Registers: Page 17

This register page shown in Table 7-218 consists of the programmable coefficients for the ASI DIN mixer for DAC channels 1 to 4, DAC Aux mixer, Loopback mixer, Signal-generator mixer and the DAC first-order IIR filter.

Table 7-212 Page 17 Programmable Coefficient Registers
ADDRESS REGISTER RESET DESCRIPTION
0x00 PAGE[7:0] 0x00 Device Page Register
0x08 ASI_DIN_MIX_ASI_CH1_RDAC_MIX_BYT1[7:0] 0x00 ASI DIN MIXER, ASI CH1 to RDAC coefficient byte[15:8]
0x09 ASI_DIN_MIX_ASI_CH1_RDAC_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI CH1 to RDAC coefficient byte[7:0]
0x0A ASI_DIN_MIX_ASI_CH1_LDAC_MIX_BYT1[7:0] 0x40 ASI DIN MIXER, ASI CH1 to LDAC coefficient byte[15:8]
0x0B ASI_DIN_MIX_ASI_CH1_LDAC_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI CH1 to LDAC coefficient byte[7:0]
0x0C ASI_DIN_MIX_ASI_CH1_RDAC2_MIX_BYT1[7:0] 0x00 ASI DIN MIXER, ASI CH1 to RDAC2 coefficient byte[15:8]
0x0D ASI_DIN_MIX_ASI_CH1_RDAC2_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI CH1 to RDAC2 coefficient byte[7:0]
0x0E ASI_DIN_MIX_ASI_CH1_LDAC2_MIX_BYT1[7:0] 0x00 ASI DIN MIXER, ASI CH1 to LDAC2 coefficient byte[15:8]
0x0F ASI_DIN_MIX_ASI_CH1_LDAC2_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI CH1 to LDAC2 coefficient byte[7:0]
0x10 ASI_DIN_MIX_ASI_CH2_RDAC_MIX_BYT1[7:0] 0x40 ASI DIN MIXER, ASI CH2 to RDAC coefficient byte[15:8]
0x11 ASI_DIN_MIX_ASI_CH2_RDAC_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI CH2 to RDAC coefficient byte[7:0]
0x12 ASI_DIN_MIX_ASI_CH2_LDAC_MIX_BYT1[7:0] 0x00 ASI DIN MIXER, ASI CH2 to LDAC coefficient byte[15:8]
0x13 ASI_DIN_MIX_ASI_CH2_LDAC_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI CH2 to LDAC coefficient byte[7:0]
0x14 ASI_DIN_MIX_ASI_CH2_RDAC2_MIX_BYT1[7:0] 0x00 ASI DIN MIXER, ASI CH2 to RDAC2 coefficient byte[15:8]
0x15 ASI_DIN_MIX_ASI_CH2_RDAC2_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI CH2 to RDAC2 coefficient byte[7:0]
0x16 ASI_DIN_MIX_ASI_CH2_LDAC2_MIX_BYT1[7:0] 0x00 ASI DIN MIXER, ASI CH2 to LDAC2 coefficient byte[15:8]
0x17 ASI_DIN_MIX_ASI_CH2_LDAC2_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI CH2 to LDAC2 coefficient byte[7:0]
0x18 ASI_DIN_MIX_ASI_CH3_RDAC_MIX_BYT1[7:0] 0x00 ASI DIN MIXER, ASI CH3 to RDAC coefficient byte[15:8]
0x19 ASI_DIN_MIX_ASI_CH3_RDAC_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI CH3 to RDAC coefficient byte[7:0]
0x1A ASI_DIN_MIX_ASI_CH3_LDAC_MIX_BYT1[7:0] 0x00 ASI DIN MIXER, ASI CH3 to LDAC coefficient byte[15:8]
0x1B ASI_DIN_MIX_ASI_CH3_LDAC_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI CH3 to LDAC coefficient byte[7:0]
0x1C ASI_DIN_MIX_ASI_CH3_RDAC2_MIX_BYT1[7:0] 0x00 ASI DIN MIXER, ASI CH3 to RDAC2 coefficient byte[15:8]
0x1D ASI_DIN_MIX_ASI_CH3_RDAC2_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI CH3 to RDAC2 coefficient byte[7:0]
0x1E ASI_DIN_MIX_ASI_CH3_LDAC2_MIX_BYT1[7:0] 0x40 ASI DIN MIXER, ASI CH3 to LDAC2 coefficient byte[15:8]
0x1F ASI_DIN_MIX_ASI_CH3_LDAC2_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI CH3 to LDAC2 coefficient byte[7:0]
0x20 ASI_DIN_MIX_ASI_CH4_RDAC_MIX_BYT1[7:0] 0x00 ASI DIN MIXER, ASI CH4 to RDAC coefficient byte[15:8]
0x21 ASI_DIN_MIX_ASI_CH4_RDAC_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI CH4 to RDAC coefficient byte[7:0]
0x22 ASI_DIN_MIX_ASI_CH4_LDAC_MIX_BYT1[7:0] 0x00 ASI DIN MIXER, ASI CH4 to LDAC coefficient byte[15:8]
0x23 ASI_DIN_MIX_ASI_CH4_LDAC_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI CH4 to LDAC coefficient byte[7:0]
0x24 ASI_DIN_MIX_ASI_CH4_RDAC2_MIX_BYT1[7:0] 0x40 ASI DIN MIXER, ASI CH4 to RDAC2 coefficient byte[15:8]
0x25 ASI_DIN_MIX_ASI_CH4_RDAC2_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI CH4 to RDAC2 coefficient byte[7:0]
0x26 ASI_DIN_MIX_ASI_CH4_LDAC2_MIX_BYT1[7:0] 0x00 ASI DIN MIXER, ASI CH4 to LDAC2 coefficient byte[15:8]
0x27 ASI_DIN_MIX_ASI_CH4_LDAC2_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI CH4 to LDAC2 coefficient byte[7:0]
0x28 ASI_DIN_MIX_ASI_CH5_RDAC_MIX_BYT1[7:0] 0x00 ASI DIN MIXER, ASI CH5 to RDAC coefficient byte[15:8]
0x29 ASI_DIN_MIX_ASI_CH5_RDAC_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI CH5 to RDAC coefficient byte[7:0]
0x2A ASI_DIN_MIX_ASI_CH5_LDAC_MIX_BYT1[7:0] 0x00 ASI DIN MIXER, ASI CH5 to LDAC coefficient byte[15:8]
0x2B ASI_DIN_MIX_ASI_CH5_LDAC_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI CH5 to LDAC coefficient byte[7:0]
0x2C ASI_DIN_MIX_ASI_CH5_RDAC2_MIX_BYT1[7:0] 0x00 ASI DIN MIXER, ASI CH5 to RDAC2 coefficient byte[15:8]
0x2D ASI_DIN_MIX_ASI_CH5_RDAC2_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI CH5 to RDAC2 coefficient byte[7:0]
0x2E ASI_DIN_MIX_ASI_CH5_LDAC2_MIX_BYT1[7:0] 0x00 ASI DIN MIXER, ASI CH5 to LDAC2 coefficient byte[15:8]
0x2F ASI_DIN_MIX_ASI_CH5_LDAC2_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI CH5 to LDAC2 coefficient byte[7:0]
0x30 ASI_DIN_MIX_ASI_CH6_RDAC_MIX_BYT1[7:0] 0x00 ASI DIN MIXER, ASI CH6 to RDAC coefficient byte[15:8]
0x31 ASI_DIN_MIX_ASI_CH6_RDAC_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI CH6 to RDAC coefficient byte[7:0]
0x32 ASI_DIN_MIX_ASI_CH6_LDAC_MIX_BYT1[7:0] 0x00 ASI DIN MIXER, ASI CH6 to LDAC coefficient byte[15:8]
0x33 ASI_DIN_MIX_ASI_CH6_LDAC_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI CH6 to LDAC coefficient byte[7:0]
0x34 ASI_DIN_MIX_ASI_CH6_RDAC2_MIX_BYT1[7:0] 0x00 ASI DIN MIXER, ASI CH6 to RDAC2 coefficient byte[15:8]
0x35 ASI_DIN_MIX_ASI_CH6_RDAC2_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI CH6 to RDAC2 coefficient byte[7:0]
0x36 ASI_DIN_MIX_ASI_CH6_LDAC2_MIX_BYT1[7:0] 0x00 ASI DIN MIXER, ASI CH6 to LDAC2 coefficient byte[15:8]
0x37 ASI_DIN_MIX_ASI_CH6_LDAC2_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI CH6 to LDAC2 coefficient byte[7:0]
0x38 ASI_DIN_MIX_ASI_CH7_RDAC_MIX_BYT1[7:0] 0x00 ASI DIN MIXER, ASI CH7 to RDAC coefficient byte[15:8]
0x39 ASI_DIN_MIX_ASI_CH7_RDAC_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI CH7 to RDAC coefficient byte[7:0]
0x3A ASI_DIN_MIX_ASI_CH7_LDAC_MIX_BYT1[7:0] 0x00 ASI DIN MIXER, ASI CH7 to LDAC coefficient byte[15:8]
0x3B ASI_DIN_MIX_ASI_CH7_LDAC_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI CH7 to LDAC coefficient byte[7:0]
0x3C ASI_DIN_MIX_ASI_CH7_RDAC2_MIX_BYT1[7:0] 0x00 ASI DIN MIXER, ASI CH7 to RDAC2 coefficient byte[15:8]
0x3D ASI_DIN_MIX_ASI_CH7_RDAC2_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI CH7 to RDAC2 coefficient byte[7:0]
0x3E ASI_DIN_MIX_ASI_CH7_LDAC2_MIX_BYT1[7:0] 0x00 ASI DIN MIXER, ASI CH7 to LDAC2 coefficient byte[15:8]
0x3F ASI_DIN_MIX_ASI_CH7_LDAC2_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI CH7 to LDAC2 coefficient byte[7:0]
0x40 ASI_DIN_MIX_ASI_CH8_RDAC_MIX_BYT1[7:0] 0x00 ASI DIN MIXER, ASI CH8 to RDAC coefficient byte[15:8]
0x41 ASI_DIN_MIX_ASI_CH8_RDAC_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI CH8 to RDAC coefficient byte[7:0]
0x42 ASI_DIN_MIX_ASI_CH8_LDAC_MIX_BYT1[7:0] 0x00 ASI DIN MIXER, ASI CH8 to LDAC coefficient byte[15:8]
0x43 ASI_DIN_MIX_ASI_CH8_LDAC_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI CH8 to LDAC coefficient byte[7:0]
0x44 ASI_DIN_MIX_ASI_CH8_RDAC2_MIX_BYT1[7:0] 0x00 ASI DIN MIXER, ASI CH8 to RDAC2 coefficient byte[15:8]
0x45 ASI_DIN_MIX_ASI_CH8_RDAC2_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI CH8 to RDAC2 coefficient byte[7:0]
0x46 ASI_DIN_MIX_ASI_CH8_LDAC2_MIX_BYT1[7:0] 0x00 ASI DIN MIXER, ASI CH8 to LDAC2 coefficient byte[15:8]
0x47 ASI_DIN_MIX_ASI_CH8_LDAC2_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI CH8 to LDAC2 coefficient byte[7:0]
0x48 ASI_DIN_MIX_ASI_AUX_CH1_RDAC_MIX_BYT1[7:0] 0x00 ASI DIN MIXER, ASI AUX_CH1 to RDAC coefficient byte[15:8]
0x49 ASI_DIN_MIX_ASI_AUX_CH1_RDAC_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI AUX_CH1 to RDAC coefficient byte[7:0]
0x4A ASI_DIN_MIX_ASI_AUX_CH1_LDAC_MIX_BYT1[7:0] 0x40 ASI DIN MIXER, ASI AUX_CH1 to LDAC coefficient byte[15:8]
0x4B ASI_DIN_MIX_ASI_AUX_CH1_LDAC_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI AUX_CH1 to LDAC coefficient byte[7:0]
0x4C ASI_DIN_MIX_ASI_AUX_CH1_RDAC2_MIX_BYT1[7:0] 0x00 ASI DIN MIXER, ASI AUX_CH1 to RDAC2 coefficient byte[15:8]
0x4D ASI_DIN_MIX_ASI_AUX_CH1_RDAC2_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI AUX_CH1 to RDAC2 coefficient byte[7:0]
0x4E ASI_DIN_MIX_ASI_AUX_CH1_LDAC2_MIX_BYT1[7:0] 0x40 ASI DIN MIXER, ASI AUX_CH1 to LDAC2 coefficient byte[15:8]
0x4F ASI_DIN_MIX_ASI_AUX_CH1_LDAC2_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI AUX_CH1 to LDAC2 coefficient byte[7:0]
0x50 ASI_DIN_MIX_ASI_AUX_CH2_RDAC_MIX_BYT1[7:0] 0x40 ASI DIN MIXER, ASI AUX_CH2 to RDAC coefficient byte[15:8]
0x51 ASI_DIN_MIX_ASI_AUX_CH2_RDAC_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI AUX_CH2 to RDAC coefficient byte[7:0]
0x52 ASI_DIN_MIX_ASI_AUX_CH2_LDAC_MIX_BYT1[7:0] 0x00 ASI DIN MIXER, ASI AUX_CH2 to LDAC coefficient byte[15:8]
0x53 ASI_DIN_MIX_ASI_AUX_CH2_LDAC_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI AUX_CH2 to LDAC coefficient byte[7:0]
0x54 ASI_DIN_MIX_ASI_AUX_CH2_RDAC2_MIX_BYT1[7:0] 0x40 ASI DIN MIXER, ASI AUX_CH2 to RDAC2 coefficient byte[15:8]
0x55 ASI_DIN_MIX_ASI_AUX_CH2_RDAC2_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI AUX_CH2 to RDAC2 coefficient byte[7:0]
0x56 ASI_DIN_MIX_ASI_AUX_CH2_LDAC2_MIX_BYT1[7:0] 0x00 ASI DIN MIXER, ASI AUX_CH2 to LDAC2 coefficient byte[15:8]
0x57 ASI_DIN_MIX_ASI_AUX_CH2_LDAC2_MIX_BYT2[7:0] 0x00 ASI DIN MIXER, ASI AUX_CH2 to LDAC2 coefficient byte[7:0]
0x58 SC_DAC_MIX_ADCLB_CH1_RDAC_MIX_BYT1[7:0] 0x00 SC DAC MIXER, ADC Loopback CH1 to RDAC coefficient byte[15:8]
0x59 SC_DAC_MIX_ADCLB_CH1_RDAC_MIX_BYT2[7:0] 0x00 SC DAC MIXER, ADC Loopback CH1 to RDAC coefficient byte[7:0]
0x5A SC_DAC_MIX_ADCLB_CH1_LDAC_MIX_BYT1[7:0] 0x00 SC DAC MIXER, ADC Loopback CH1 to LDAC coefficient byte[15:8]
0x5B SC_DAC_MIX_ADCLB_CH1_LDAC_MIX_BYT2[7:0] 0x00 SC DAC MIXER, ADC Loopback CH1 to LDAC coefficient byte[7:0]
0x5C SC_DAC_MIX_ADCLB_CH1_RDAC2_MIX_BYT1[7:0] 0x00 SC DAC MIXER, ADC Loopback CH1 to RDAC2 coefficient byte[15:8]
0x5D SC_DAC_MIX_ADCLB_CH1_RDAC2_MIX_BYT2[7:0] 0x00 SC DAC MIXER, ADC Loopback CH1 to RDAC2 coefficient byte[7:0]
0x5E SC_DAC_MIX_ADCLB_CH1_LDAC2_MIX_BYT1[7:0] 0x00 SC DAC MIXER, ADC Loopback CH1 to LDAC2 coefficient byte[15:8]
0x5F SC_DAC_MIX_ADCLB_CH1_LDAC2_MIX_BYT2[7:0] 0x00 SC DAC MIXER, ADC Loopback CH1 to LDAC2 coefficient byte[7:0]
0x60 SC_DAC_MIX_ADCLB_CH2_RDAC_MIX_BYT1[7:0] 0x00 SC DAC MIXER, ADC Loopback CH2 to RDAC coefficient byte[15:8]
0x61 SC_DAC_MIX_ADCLB_CH2_RDAC_MIX_BYT2[7:0] 0x00 SC DAC MIXER, ADC Loopback CH2 to RDAC coefficient byte[7:0]
0x62 SC_DAC_MIX_ADCLB_CH2_LDAC_MIX_BYT1[7:0] 0x00 SC DAC MIXER, ADC Loopback CH2 to LDAC coefficient byte[15:8]
0x63 SC_DAC_MIX_ADCLB_CH2_LDAC_MIX_BYT2[7:0] 0x00 SC DAC MIXER, ADC Loopback CH2 to LDAC coefficient byte[7:0]
0x64 SC_DAC_MIX_ADCLB_CH2_RDAC2_MIX_BYT1[7:0] 0x00 SC DAC MIXER, ADC Loopback CH2 to RDAC2 coefficient byte[15:8]
0x65 SC_DAC_MIX_ADCLB_CH2_RDAC2_MIX_BYT2[7:0] 0x00 SC DAC MIXER, ADC Loopback CH2 to RDAC2 coefficient byte[7:0]
0x66 SC_DAC_MIX_ADCLB_CH2_LDAC2_MIX_BYT1[7:0] 0x00 SC DAC MIXER, ADC Loopback CH2 to LDAC2 coefficient byte[15:8]
0x67 SC_DAC_MIX_ADCLB_CH2_LDAC2_MIX_BYT2[7:0] 0x00 SC DAC MIXER, ADC Loopback CH2 to LDAC2 coefficient byte[7:0]
0x68 SC_DAC_MIX_SIGGEN_CH1_RDAC_MIX_BYT1[7:0] 0x00 SC DAC MIXER, Signal Generator CH1 to RDAC coefficient byte[15:8]
0x69 SC_DAC_MIX_SIGGEN_CH1_RDAC_MIX_BYT2[7:0] 0x00 SC DAC MIXER, Signal Generator CH1 to RDAC coefficient byte[7:0]
0x6A SC_DAC_MIX_SIGGEN_CH1_LDAC_MIX_BYT1[7:0] 0x00 SC DAC MIXER, Signal Generator CH1 to LDAC coefficient byte[15:8]
0x6B SC_DAC_MIX_SIGGEN_CH1_LDAC_MIX_BYT2[7:0] 0x00 SC DAC MIXER, Signal Generator CH1 to LDAC coefficient byte[7:0]
0x6C SC_DAC_MIX_SIGGEN_CH1_RDAC2_MIX_BYT1[7:0] 0x00 SC DAC MIXER, Signal Generator CH1 to RDAC2 coefficient byte[15:8]
0x6D SC_DAC_MIX_SIGGEN_CH1_RDAC2_MIX_BYT2[7:0] 0x00 SC DAC MIXER, Signal Generator CH1 to RDAC2 coefficient byte[7:0]
0x6E SC_DAC_MIX_SIGGEN_CH1_LDAC2_MIX_BYT1[7:0] 0x00 SC DAC MIXER, Signal Generator CH1 to LDAC2 coefficient byte[15:8]
0x6F SC_DAC_MIX_SIGGEN_CH1_LDAC2_MIX_BYT2[7:0] 0x00 SC DAC MIXER, Signal Generator CH1 to LDAC2 coefficient byte[7:0]
0x70 SC_DAC_MIX_SIGGEN_CH2_RDAC_MIX_BYT1[7:0] 0x00 SC DAC MIXER, Signal Generator CH2 to RDAC coefficient byte[15:8]
0x71 SC_DAC_MIX_SIGGEN_CH2_RDAC_MIX_BYT2[7:0] 0x00 SC DAC MIXER, Signal Generator CH2 to RDAC coefficient byte[7:0]
0x72 SC_DAC_MIX_SIGGEN_CH2_LDAC_MIX_BYT1[7:0] 0x00 SC DAC MIXER, Signal Generator CH2 to LDAC coefficient byte[15:8]
0x73 SC_DAC_MIX_SIGGEN_CH2_LDAC_MIX_BYT2[7:0] 0x00 SC DAC MIXER, Signal Generator CH2 to LDAC coefficient byte[7:0]
0x74 SC_DAC_MIX_SIGGEN_CH2_RDAC2_MIX_BYT1[7:0] 0x00 SC DAC MIXER, Signal Generator CH2 to RDAC2 coefficient byte[15:8]
0x75 SC_DAC_MIX_SIGGEN_CH2_RDAC2_MIX_BYT2[7:0] 0x00 SC DAC MIXER, Signal Generator CH2 to RDAC2 coefficient byte[7:0]
0x76 SC_DAC_MIX_SIGGEN_CH2_LDAC2_MIX_BYT1[7:0] 0x00 SC DAC MIXER, Signal Generator CH2 to LDAC2 coefficient byte[15:8]
0x77 SC_DAC_MIX_SIGGEN_CH2_LDAC2_MIX_BYT2[7:0] 0x00 SC DAC MIXER, Signal Generator CH2 to LDAC2 coefficient byte[7:0]
0x78 DAC_IIR_N0_BYT1[7:0] 0x7F Programmable DAC first-order IIR, N0 coefficient byte[31:24]
0x79 DAC_IIR_N0_BYT2[7:0] 0xFF Programmable DAC first-order IIR, N0 coefficient byte[23:16]
0x7A DAC_IIR_N0_BYT3[7:0] 0xFF Programmable DAC first-order IIR, N0 coefficient byte[15:8]
0x7B DAC_IIR_N0_BYT4[7:0] 0xFF Programmable DAC first-order IIR, N0 coefficient byte[7:0]
0x7C DAC_IIR_N1_BYT1[7:0] 0x00 Programmable DAC first-order IIR, N1 coefficient byte[31:24]
0x7D DAC_IIR_N1_BYT2[7:0] 0x00 Programmable DAC first-order IIR, N1 coefficient byte[23:16]
0x7E DAC_IIR_N1_BYT3[7:0] 0x00 Programmable DAC first-order IIR, N1 coefficient byte[15:8]
0x7F DAC_IIR_N1_BYT4[7:0] 0x00 Programmable DAC first-order IIR, N1 coefficient byte[7:0]