SLASF27 December   2023 TAC5242

ADVANCE INFORMATION  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements: TDM, I2S or LJ Interface
    7. 6.7 Switching Characteristics: TDM, I2S or LJ Interface
  8. Parameter Measurement Information
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Hardware Control
      2. 8.3.2 Audio Serial Interfaces
        1. 8.3.2.1 Time Division Multiplexed Audio (TDM) Interface
        2. 8.3.2.2 Inter IC Sound (I2S) Interface
      3. 8.3.3 Phase-Locked Loop (PLL) and Clock Generation
      4. 8.3.4 Analog Input Output Configurations
      5. 8.3.5 Reference Voltage
      6. 8.3.6 ADC Signal-Chain
        1. 8.3.6.1 Digital High-Pass Filter
        2. 8.3.6.2 Configurable Digital Decimation Filters
          1. 8.3.6.2.1 Linear Phase Filters
            1. 8.3.6.2.1.1 Sampling Rate: 16 kHz or 14.7 kHz
            2. 8.3.6.2.1.2 Sampling Rate: 24 kHz or 22.05 kHz
            3. 8.3.6.2.1.3 Sampling Rate: 32 kHz or 29.4 kHz
            4. 8.3.6.2.1.4 Sampling Rate: 48 kHz or 44.1 kHz
            5. 8.3.6.2.1.5 Sampling Rate: 96 kHz or 88.2 kHz
      7. 8.3.7 DAC Signal-Chain
        1. 8.3.7.1 Configurable Digital Interpolation Filters
          1. 8.3.7.1.1 Linear Phase Filters
            1. 8.3.7.1.1.1 Sampling Rate: 16 kHz or 14.7 kHz
            2. 8.3.7.1.1.2 Sampling Rate: 24 kHz or 22.05 kHz
            3. 8.3.7.1.1.3 Sampling Rate: 32 kHz or 29.4 kHz
            4. 8.3.7.1.1.4 Sampling Rate: 48 kHz or 44.1 kHz
            5. 8.3.7.1.1.5 Sampling Rate: 96 kHz or 88.2 kHz
            6. 8.3.7.1.1.6 Sampling Rate: 384 kHz or 352.8 kHz
    4. 8.4 Device Functional Modes
      1. 8.4.1 Active Mode
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Application
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure
  11. 10Power Supply Recommendations
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Description

The TAC5242 is a high performance Stereo Codec with 2VRMS differential Input, 118dB ADC and 2VRMS 119dB Stereo DAC. The TAC5242 supports both differential and Single Ended input and output. Device supports both Microphone and Line In input on ADC Channel. DAC Output can be configured for either Line Out or Head Phone Load. The device integrates a phase-locked loop (PLL), a DC removal high-pass filter (HPF) and supports sample rates up to 192kHz. TAC5242 can drive upto 62 mW into a Headphone Load. The TAC5242 supports time-division multiplexing (TDM), left-justified (LJ), or I2S audio formats in controller and target mode, and is pin controlled. These integrated high-performance features, pin control along with a single supply operation, make TAC5242 an excellent choice for space-constrained audio applications.

Device Information
PART NUMBERPACKAGE(1)BODY SIZE (NOM)
TAC5242WQFN (28)4mm x 4mm with 0.5mm Pitch
For all available packages, see the orderable addendum at the end of the data sheet.
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