SLOS982C August 2017 – April 2018 TAS5755M
PRODUCTION DATA.
When a back-end error signal is received from the internal power stage, the power stage is reset stopping all PWM activity. Subsequently, the modulator waits approximately for the time listed in Table 18 before attempting to re-start the power stage.
D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 | FUNCTION |
0 | 0 | 0 | 0 | 0 | 0 | 0 | X | Reserved |
– | – | – | – | 0 | 0 | 1 | 0 | Set back-end reset period to 299 ms(1) |
– | – | – | – | 0 | 0 | 1 | 1 | Set back-end reset period to 449 ms |
– | – | – | – | 0 | 1 | 0 | 0 | Set back-end reset period to 598 ms |
– | – | – | – | 0 | 1 | 0 | 1 | Set back-end reset period to 748 ms |
– | – | – | – | 0 | 1 | 1 | 0 | Set back-end reset period to 898 ms |
– | – | – | – | 0 | 1 | 1 | 1 | Set back-end reset period to 1047 ms |
– | – | – | – | 1 | 0 | 0 | 0 | Set back-end reset period to 1197 ms |
– | – | – | – | 1 | 0 | 0 | 1 | Set back-end reset period to 1346 ms |
– | – | – | – | 1 | 0 | 1 | X | Set back-end reset period to 1496 ms |
– | – | – | – | 1 | 1 | X | X | Set back-end reset period to 1496 ms |