SLASEP9 May 2019 TAS5806M
PRODUCTION DATA.
PHASE_CTRL is shown in Figure 100 and described in Table 37.
Return to Summary Table.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | RAMP_PHASE_SEL | PHASE_SYNC _SEL | PHASE_SYNC _EN | ||||
R/W | R/W | R/W | R/W | ||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7-4 | RESERVED | R/W | 0000 |
This bit is reserved |
3-2 | RAMP_PHASE_SEL | R/W | 00 |
Select ramp clock phase when multi devices integrated in one system to reduce EMI and peak supply peak current, it is recomended set all devices the same RAMP frequency and same spread spectrum. it must be set before driving device into PLAY mode if this feature is needed. 00: phase0 01: phase1 10: phase2 11: phase3 |
1 | I2S_SYNC_EN | R/W | 0 |
Use I2S to synchronize output PWM phase 0: Disable 1: Enable |
0 | PHASE_SYNC_EN | R/W | 0 |
0: RAMP phase sync disable 1: RAMP phase sync enable |