SCPS194F May   2009  – January 2023 TCA6416A

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Requirements
    7. 6.7 Reset Timing Requirements
    8. 6.8 Switching Characteristics
    9. 6.9 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Voltage Translation
      2. 8.3.2 I/O Port
      3. 8.3.3 Interrupt Output ( INT)
      4. 8.3.4 Reset Input ( RESET)
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-On Reset
    5. 8.5 Programming
      1. 8.5.1 I2C Interface
    6. 8.6 Register Maps
      1. 8.6.1 Device Address
      2. 8.6.2 Control Register and Command Byte
      3. 8.6.3 Register Descriptions
      4. 8.6.4 Bus Transactions
        1. 8.6.4.1 Writes
        2. 8.6.4.2 Reads
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Minimizing ICC When I/Os Control LEDs
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power-On Reset Requirements
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

Figure 5-1 PW package, 24-Pin TSSOP
(Top View)
Figure 5-2 RTW Package, 24-Pin WQFN
(Top View)
Figure 5-3 ZQS Package 24-Pin
Microstar BGATM Junior
(Top View)
Table 5-1 Pin Functions
PIN DESCRIPTION
NAME TSSOP
(PW)		 QFN
(RTW)		 BGA
(ZQS)
INT 1 22 A3 Interrupt output. Connect to VCCI or VCCP through a pull-up resistor.
VCCI 2 23 B3 Supply voltage of I2C bus. Connect directly to the supply voltage of the external I2C controller.
RESET 3 24 A2 Active-low reset input. Connect to VCCI or VCCP through a pull-up resistor, if no active connection is used.
P00 4 1 A1 P-port input/output (push-pull design structure). At power on, P00 is configured as an input.
P01 5 2 C3 P-port input/output (push-pull design structure). At power on, P01 is configured as an input.
P02 6 3 B1 P-port input/output (push-pull design structure). At power on, P02 is configured as an input.
P03 7 4 C1 P-port input/output (push-pull design structure). At power on, P03 is configured as an input.
P04 8 5 C2 P-port input/output (push-pull design structure). At power on, P04 is configured as an input.
P05 9 6 D1 P-port input/output (push-pull design structure). At power on, P05 is configured as an input.
P06 10 7 E1 P-port input/output (push-pull design structure). At power on, P06 is configured as an input.
P07 11 8 D2 P-port input/output (push-pull design structure). At power on, P07 is configured as an input.
GND 12 9 E2 Ground
P10 13 10 E3 P-port input/output (push-pull design structure). At power on, P10 is configured as an input.
P11 14 11 E4 P-port input/output (push-pull design structure). At power on, P11 is configured as an input.
P12 15 12 D3 P-port input/output (push-pull design structure). At power on, P12 is configured as an input.
P13 16 13 E5 P-port input/output (push-pull design structure). At power on, P13 is configured as an input.
P14 17 14 D4 P-port input/output (push-pull design structure). At power on, P14 is configured as an input.
P15 18 15 D5 P-port input/output (push-pull design structure). At power on, P15 is configured as an input.
P16 19 16 C5 P-port input/output (push-pull design structure). At power on, P16 is configured as an input.
P17 20 17 C4 P-port input/output (push-pull design structure). At power on, P17 is configured as an input.
ADDR 21 18 B5 Address input. Connect directly to VCCP or ground.
SCL 22 19 A5 Serial clock bus. Connect to VCCI through a pull-up resistor.
SDA 23 20 A4 Serial data bus. Connect to VCCI through a pull-up resistor.
VCCP 24 21 B4 Supply voltage of TCA6416A for P-ports