SPRS958H March 2016 – November 2019
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
Table 3-1 shows a comparison between devices, highlighting the differences.
FEATURES | DEVICE | |||
---|---|---|---|---|
TDA2EG | ||||
Features | ||||
CTRL_WKUP_STD_FUSE_DIE_ID_2[31:24] Base PN register bit field value(1)(2) | TDA2EGx: 20 (0x14) | |||
Processors/Accelerators | ||||
Speed Grades | H, D | |||
Arm Single Cortex-A15 Microprocessor (MPU) Subsystem | MPU core 0 | Yes | ||
C66x VLIW DSP | DSP1 | Yes | ||
BitBLT 2D Hardware Acceleration Engine (BB2D) | BB2D | Yes | ||
Display Subsystem | VOUT1 | Yes | ||
VOUT2 | Yes | |||
VOUT3 | Yes | |||
HDMI | Yes | |||
Dual Arm Cortex-M4 Image Processing Unit (IPU) | IPU1 | Yes | ||
IPU2 | Yes | |||
Image Video Accelarator (IVA) | IVA | Yes | ||
SGX544 Single-Core 3D Graphics Processing Unit (GPU) | GPU | Yes | ||
Video Input Port (VIP) | VIP1 | vin1a | Yes | |
vin1b | Yes | |||
vin2a | Yes | |||
vin2b | Yes | |||
Video Processing Engine (VPE) | VPE | Yes | ||
Program/Data Storage | ||||
On-Chip Shared Memory (RAM) | OCMC_RAM1 | 512KB | ||
General-Purpose Memory Controller (GPMC) | GPMC | Yes | ||
DDR3 Memory Controller | EMIF1 | up to 2GB across single chip select | ||
SECDED/ECC | Yes | |||
Dynamic Memory Manager (DMM) | DMM | Yes | ||
Peripherals | ||||
Dual Controller Area Network (DCAN) Interface | DCAN1 | Yes | ||
DCAN2 | Yes | |||
Enhanced DMA (EDMA) | EDMA | Yes | ||
System DMA (DMA_SYSTEM) | DMA_SYSTEM | Yes | ||
Ethernet Subsystem (Ethernet SS) | GMAC_SW[0] | MII, RMII, or RGMII | ||
GMAC_SW[1] | MII, RMII, or RGMII | |||
General-Purpose I/O (GPIO) | GPIO | up to 215 | ||
Inter-Integrated Circuit (I2C) Interface | I2C | 6 | ||
System Mailbox Module | MAILBOX | 13 | ||
Camera Adaptation Layer (CAL) Camera Serial Interface 2 (CSI2) | CSI2_0 | 1 CLK + 4 Data Line | ||
CSI2_1 | 1 CLK + 2 Data Line | |||
Multichannel Audio Serial Port (McASP) | McASP1 | 16 serializers | ||
McASP2 | 16 serializers | |||
McASP3 | 4 serializers | |||
McASP4 | 4 serializers | |||
McASP5 | 4 serializers | |||
McASP6 | 4 serializers | |||
McASP7 | 4 serializers | |||
McASP8 | 4 serializers | |||
MultiMedia Card/Secure Digital/Secure Digital Input Output Interface (MMC/SD/SDIO) | MMC1 | 1x UHSI 4b | ||
MMC2 | 1x eMMC™ 8b | |||
MMC3 | 1x SDIO 8b | |||
MMC4 | 1x SDIO 4b | |||
PCI-Express 3.0 Port with Integrated PHY | PCIe_SS1 | Yes | ||
PCIe_SS2 | Yes | |||
Serial Advanced Technology Attachment (SATA) | SATA | Yes | ||
Real-Time Clock Subsystem (RTCSS) | RTCSS | Yes | ||
Multichannel Serial Peripheral Interface (McSPI) | McSPI | 4 | ||
Quad SPI (QSPI) | QSPI | Yes | ||
Spinlock Module | SPINLOCK | Yes | ||
Timers, General-Purpose | TIMERS GP | 16 | ||
Timer, Watchdog | WD TIMER | Yes | ||
Pulse-Width Modulation Subsystem (PWMSS) | PWMSS1 | Yes | ||
PWMSS2 | Yes | |||
PWMSS3 | Yes | |||
Universal Asynchronous Receiver/Transmitter (UART) | UART | 10 | ||
Universal Serial Bus (USB3.0) | USB1 (SuperSpeed, Dual-Role-Device [DRD]) | Yes | ||
Universal Serial Bus (USB2.0) | USB2 (High Speed, Dual-Role-Device [DRD], with embedded HS PHY) | Yes | ||
USB3 (High Speed, OTG2.0, with ULPI) | Yes | |||
USB4 (High Speed, OTG2.0, with ULPI) | No |