SLDS120G March   2000  – May 2016 TFP401 , TFP401A

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (Continued)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 DC Digital I/O Electrical Characteristics
    6. 7.6 DC Electrical Characteristics
    7. 7.7 AC Electrical Characteristics
    8. 7.8 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 TMDS Pixel Data and Control Signal Encoding
      2. 9.3.2 TFP401/401A Clocking and Data Synchronization
      3. 9.3.3 TFP401/401A TMDS Input Levels and Input Impedance Matching
      4. 9.3.4 TFP401A Incorporates HSYNC Jitter Immunity
    4. 9.4 Device Functional Modes
      1. 9.4.1 TFP401/401A Modes of Operation
      2. 9.4.2 TFP401/401A Output Driver Configurations
        1. 9.4.2.1 Output Driver Power Down
        2. 9.4.2.2 Drive Strength
        3. 9.4.2.3 Time-Staggered Pixel Output
        4. 9.4.2.4 Power Management
        5. 9.4.2.5 Sync Detect
  10. 10Applications and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Data and Control Signals
        2. 10.2.2.2 Configuration Options
        3. 10.2.2.3 Power Supplies Decoupling
      3. 10.2.3 Application Curve
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 Layer Stack
      2. 12.1.2 Routing High-Speed Differential Signal Traces (RxC-, RxC+, Rx0-, Rx0+, Rx1-, Rx1+, Rx2-, Rx2+)
      3. 12.1.3 DVI Connector
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Related Links
    2. 13.2 Trademarks
    3. 13.3 Electrostatic Discharge Caution
    4. 13.4 Glossary
  14. 14Mechanical, Packaging, and Orderable Information
    1. 14.1 TI PowerPAD 100-TQFP Package

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Supports Pixel Rates up to 165 MHz (Including 1080p and WUXGA at 60 Hz)
  • Digital Visual Interface (DVI) Specification Compliant (1)
  • True-Color, 24-Bit/Pixel, 16.7M Colors at 1 or 2 Pixels per Clock
  • Laser Trimmed Internal Termination Resistors for Optimum Fixed Impedance Matching
  • Skew Tolerant up to One Pixel-Clock Cycle
  • 4× Oversampling
  • Reduced Power Consumption – 1.8-V Core Operation With 3.3-V I/Os and Supplies (2)
  • Reduced Ground Bounce Using Time-Staggered Pixel Outputs
  • Low Noise and Good Power Dissipation Using TI PowerPAD™ Packaging
  • Advanced Technology Using TI 0.18-µm EPIC-5 CMOS Process
  • TFP401A Incorporates HSYNC Jitter Immunity (3)
(1)(2)(3)
(3)The TFP401A incorporates additional circuitry to create a stable HSYNC from DVI transmitters that introduce undesirable jitter on the transmitted HSYNC signal.
(2)The TFP401/401A has an internal voltage regulator that provides the 1.8-V core power supply from the external 3.3-V supplies.
(1)The Digital Visual Interface Specification, DVI, is an industry standard developed by the Digital Display Working Group (DDWG) for high-speed digital connection to digital displays. The TPF401 and TFP401A are compliant with the DVI Specification Rev. 1.0.

2 Applications

  • High-Definition TV
  • HD PC Monitors
  • Digital Video
  • HD Projectors
  • DVI/HDMI Receivers (HDMI Video-Only)

3 Description

The Texas Instruments TFP401 and TFP401A are TI PanelBus™ flat-panel display products, part of a comprehensive family of end-to-end DVI 1.0 compliant solutions. Targeted primarily at desktop LCD monitors and digital projectors, the TFP401/401A finds applications in any design requiring high-speed digital interface.

The TFP401 and TFP401A supports display resolutions up to 1080p and WUXGA in 24-bit true-color pixel format. The TFP401/401A offers design flexibility to drive one or two pixels per clock, supports TFT or DSTN panels, and provides an option for time-staggered pixel outputs for reduced ground bounce.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TFP401 HTQFP (100) 14.00 mm × 14.00 mm
TFP401A
  1. For all available packages, see the orderable addendum at the end of the datasheet.

TFP401 Diagram

TFP401 TFP401A keygraphic_slds120.gif